From: Thomas Gessler thomas.gessler@brueckmann-gmbh.de
[ Upstream commit 7e01511443c30a55a5ae78d3debd46d4d872517e ]
Coalesce the direction bits from the enabled TX and/or RX channels into the directions bit mask of dma_device. Without this mask set, dma_get_slave_caps() in the DMAEngine fails, which prevents the driver from being used with an IIO DMAEngine buffer.
Signed-off-by: Thomas Gessler thomas.gessler@brueckmann-gmbh.de Reviewed-by: Suraj Gupta suraj.gupta2@amd.com Tested-by: Folker Schwesinger dev@folker-schwesinger.de Link: https://lore.kernel.org/r/20250507182101.909010-1-thomas.gessler@brueckmann-... Signed-off-by: Vinod Koul vkoul@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org ---
**YES**
## Analysis
This commit should be backported to stable kernel trees because it fixes a critical functionality bug that prevents the Xilinx DMA driver from working with important subsystems.
### The Problem The commit addresses a fundamental issue where `dma_get_slave_caps()` fails when called on Xilinx DMA channels. The code change shows that the driver was not setting the `directions` field in the `dma_device` structure:
```c + xdev->common.directions |= chan->direction; ```
This single line fix accumulates the direction capabilities from individual channels (either `DMA_MEM_TO_DEV` or `DMA_DEV_TO_MEM`) into the device-level `directions` bitmask.
### Why This Qualifies for Backporting
1. **Fixes Important User-Facing Bug**: The commit message explicitly states this prevents the driver from being used with IIO DMAEngine buffers, which is a significant functional regression affecting real users.
2. **Small and Contained Fix**: The change is minimal - just one line of code that sets a required field during channel probe. This has extremely low risk of introducing regressions.
3. **Critical Subsystem Integration**: Without this fix, `dma_get_slave_caps()` calls fail with `-ENXIO`, breaking integration with any subsystem that queries DMA capabilities (like IIO).
4. **Clear Root Cause**: The fix directly addresses the root cause - the missing `directions` field that the DMAEngine core requires to be set.
5. **No Architectural Changes**: This doesn't introduce new features or change driver architecture; it simply provides required capability information that was missing.
### Comparison to Reference Commits This closely matches **Similar Commit #1** (marked YES) which also fixed a missing capability flag (`DMA_CYCLIC cap_mask bit`) that prevented proper DMA channel allocation. Both commits: - Fix missing capability declarations - Are small, single-line changes - Address integration failures with other subsystems - Have minimal regression risk
The commit also mirrors **Similar Commit #2** (marked YES) which fixed incorrect struct usage in the same driver - both address functional correctness issues in the Xilinx DMA driver.
### Risk Assessment The risk is minimal because: - The change only affects the capability reporting mechanism - It doesn't modify any data paths or transfer logic - The direction values being OR'd together are already correctly set per-channel - Failure mode is obvious (capability queries will work instead of failing)
This is a textbook example of a stable tree candidate: it fixes an important bug affecting real users with a minimal, low-risk change that doesn't introduce new functionality.
drivers/dma/xilinx/xilinx_dma.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c index be44c86a1e037..5b5cbea997ff7 100644 --- a/drivers/dma/xilinx/xilinx_dma.c +++ b/drivers/dma/xilinx/xilinx_dma.c @@ -2490,6 +2490,8 @@ static int xilinx_dma_chan_probe(struct xilinx_dma_device *xdev, return -EINVAL; }
+ xdev->common.directions |= chan->direction; + /* Request the interrupt */ chan->irq = irq_of_parse_and_map(node, 0); err = request_irq(chan->irq, xilinx_dma_irq_handler, IRQF_SHARED,