21 May
2019
21 May
'19
6:43 p.m.
Quoting Peng Fan (2019-05-19 19:03:19)
To Frac pll, the gate shift is 13, however to Int PLL the gate shift is 11.
Cc: stable@vger.kernel.org Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for imx8mm") Signed-off-by: Peng Fan peng.fan@nxp.com Reviewed-by: Fabio Estevam festevam@gmail.com Reviewed-by: Jacky Bai ping.bai@nxp.com
Applied to clk-fixes