The retain_ff bit should be updated for a GDSC when it is under SW control and ON. The current sequence needs to be fixed as the GDSC needs to update retention and is moved to HW control which does not guarantee the GDSC to be in enabled state.
During the GDSC FSM state, the GDSC hardware waits for an ACK and the timeout for the ACK is 2000us as per design requirements.
Signed-off-by: Taniya Das quic_tdas@quicinc.com --- Taniya Das (2): clk: qcom: gdsc: Set retain_ff before moving to HW CTRL clk: qcom: gdsc: Update the status poll timeout for GDSC
drivers/clk/qcom/gdsc.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) --- base-commit: c674aa7c289e51659e40dda0f954886ef7f80042 change-id: 20250212-gdsc_fixes-77e8b8e27e2f
Best regards,