[AMD Public Use]
From: Greg KH gregkh@linuxfoundation.org Sent: Thursday, April 15, 2021 2:30 PM To: Liang, Prike Prike.Liang@amd.com Cc: linux-nvme@lists.infradead.org; Chaitanya.Kulkarni@wdc.com; hch@infradead.org; stable@vger.kernel.org; Deucher, Alexander Alexander.Deucher@amd.com; S-k, Shyam-sundar <Shyam-sundar.S- k@amd.com> Subject: Re: [PATCH v4 2/2] nvme-pci: add AMD PCIe quirk for suspend/resume
On Thu, Apr 15, 2021 at 11:52:05AM +0800, Prike Liang wrote:
The NVME device pluged in some AMD PCIE root port will resume timeout from s2idle which caused by NVME power CFG lost in the SMU FW restore. This issue can be workaround by using PCIe power set with simple suspend/resume process path instead of APST. In the onwards ASIC will try do the NVME shutdown save and restore in the BIOS and still need PCIe power setting to resume from RTD3 for s2idle.
Update the nvme_acpi_storage_d3() _with previously added quirk.
Cc: stable@vger.kernel.org # 5.11+ Signed-off-by: Prike Liang Prike.Liang@amd.com Signed-off-by: Shyam Sundar S K Shyam-sundar.S-k@amd.com [ck: split patches for nvme and pcie] Signed-off-by: Chaitanya Kulkarni chaitanya.kulkarni@wdc.com
Reviewed-by: Chaitanya Kulkarni chaitanya.kulkarni@wdc.com
You don't sign off and review a patch. And you do not put a blank line between them, this should all be one chunk of text.
Changes in v2: Fix the patch format and check chip root complex DID instead of PCIe RP to avoid the storage device plugged in internal PCIe RP by USB adaptor.
Changes in v3: According to Christoph Hellwig do NVME PCIe related identify opt better in PCIe quirk driver rather than in NVME module.
Changes in v4: Split the fix to PCIe and NVMe part and then call the pci_dev_put() put the device reference count and finally refine the commit info.
drivers/nvme/host/pci.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index 6bad4d4..ce9f42b 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -2832,6 +2832,7 @@ static bool nvme_acpi_storage_d3(struct pci_dev *dev) { struct acpi_device *adev; struct pci_dev *root; +struct pci_dev *rdev; acpi_handle handle; acpi_status status; u8 val; @@ -2845,6 +2846,12 @@ static bool nvme_acpi_storage_d3(struct
pci_dev *dev)
if (!root) return false;
+rdev = pci_get_domain_bus_and_slot(0, 0, PCI_DEVFN(0, 0));
Please look at the root bus for the specific device, do not assume that you are only on this specific bus.
Thanks proposal, do you mean search the root complex device should by NVMe RP bus and something like as the following? rdev = pci_get_domain_bus_and_slot(pci_domain_nr(root->bus), root->bus->number, PCI_DEVFN(0, 0));
greg k-h