Hi!
On 26/04/2020 17:40, Tudor.Ambarus@microchip.com wrote:
On Thursday, February 27, 2020 2:36:57 PM EEST Alexander A Sverdlin wrote:
Spansion S25FS-S family has an issue in Basic Flash Parameter Table:
But you modify the s25fl256s0 entry. We have to fix the flash identification first. How about the patch from below?
Author: Tudor Ambarus tudor.ambarus@microchip.com Date: Sun Apr 26 18:33:33 2020 +0300
mtd: spi-nor: spansion: Differentiate between s25fl256s and s25fs256ss25fs256s was identified as s25fl256s. Differentiate between them by the Family ID using the INFO6 macro. Fixes: c4b3eacc1dfe ("spi-nor: Recover from Spansion/Cypress errors")
The patch itself looks fine to me except the "Fixes:" tag above, which has a potential for improvement. The mentioned commit is not related to FL-FS aliasing.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index ea72f0e5be73..8ea30491cdd7 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -25,15 +25,21 @@ static const struct flash_info spansion_parts[] = { { "s25fs128s1", INFO6(0x012018, 0x4d0181, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
{ "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128,SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |USE_CLSR) },{ "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512,SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |USE_CLSR) },
{ "s25fl256s0", INFO6(0x010219, 0x4d0080, 256 * 1024, 128,SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |USE_CLSR) },{ "s25fl256s1", INFO6(0x010219, 0x4d0180, 64 * 1024, 512,SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |USE_CLSR) }, { "s25fl512s", INFO6(0x010220, 0x4d0080, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | USE_CLSR) },{ "s25fs256s0", INFO6(0x010219, 0x4d0081, 256 * 1024, 128,SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |USE_CLSR) },{ "s25fs256s1", INFO6(0x010219, 0x4d0181, 64 * 1024, 512,SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |USE_CLSR) }, { "s25fs512s", INFO6(0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },