On Thu, 15 Sep 2022 14:15:13 PDT (-0700), heiko@sntech.de wrote:
Am Donnerstag, 15. September 2022, 19:09:00 CEST schrieb Palmer Dabbelt:
We could make the T-Head CMOs depend on a new-enough assembler to have Zicbom, but it's not strictly necessary because the T-Head CMOs circumvent the assembler.
Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing") Cc: stable@vger.kernel.org Reported-by: kernel test robot lkp@intel.com Reported-by: Conor Dooley conor.dooley@microchip.com Signed-off-by: Palmer Dabbelt palmer@rivosinc.com
Reviewed-by: Heiko Stuebner heiko@sntech.de
Thanks, this is on fixes (a little late this week due to the conferences, but I'm still hoping for rc6).
arch/riscv/include/asm/cacheflush.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h index a89c005b4bbf..273ece6b622f 100644 --- a/arch/riscv/include/asm/cacheflush.h +++ b/arch/riscv/include/asm/cacheflush.h @@ -42,8 +42,12 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
#endif /* CONFIG_SMP */
-#ifdef CONFIG_RISCV_ISA_ZICBOM +/*
- The T-Head CMO errata internally probe the CBOM block size, but otherwise
- don't depend on Zicbom.
- */
extern unsigned int riscv_cbom_block_size; +#ifdef CONFIG_RISCV_ISA_ZICBOM void riscv_init_cbom_blocksize(void); #else static inline void riscv_init_cbom_blocksize(void) { }