12 May
2021
12 May
'21
1:23 p.m.
On Wed, May 12, 2021 at 6:56 AM Michal Vokáč michal.vokac@ysoft.com wrote:
The FEC does not have a PHY so it should not have a phy-handle. It is connected to the switch at RGMII level so we need a fixed-link sub-node on both ends.
This was not a problem until the qca8k.c driver was converted to PHYLINK by commit b3591c2a3661 ("net: dsa: qca8k: Switch to PHYLINK instead of PHYLIB"). That commit revealed the FEC configuration was not correct.
Fixes: 87489ec3a77f ("ARM: dts: imx: Add Y Soft IOTA Draco, Hydra and Ursa boards") Cc: stable@vger.kernel.org Reviewed-by: Andrew Lunn andrew@lunn.ch Signed-off-by: Michal Vokáč michal.vokac@ysoft.com
Reviewed-by: Fabio Estevam festevam@gmail.com