Re: [PATCH 1/1] iommu/sva: Invalidate KVA range on kernel TLB flush

On 7/10/25 08:28, Jacob Pan wrote:

why would IOMMU cache all the entries if the walk is not successful?

This was one of those things which the IOMMU folks could have gone either direction on. But, they generally choose to mirror the CPU behavior when they can.

The CPU does page walks the same way. It probably requires less logic because the caches can be filled while walking down the tree and don't have to be evicted if the walk is ultimately unsuccessful.