On Mon, Sep 18, 2023 at 10:22:36AM +0100, Will Deacon wrote:
@@ -201,9 +201,14 @@ static void arm_smmu_mm_invalidate_range(struct mmu_notifier *mn, */ size = end - start;
if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM))arm_smmu_tlb_inv_range_asid(start, size, smmu_mn->cd->asid,PAGE_SIZE, false, smmu_domain);
if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_BTM)) {if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_RANGE_INV) &&size >= CMDQ_MAX_TLBI_OPS * PAGE_SIZE)arm_smmu_tlb_inv_asid(smmu_domain->smmu, smmu_mn->cd->asid);elsearm_smmu_tlb_inv_range_asid(start, size, smmu_mn->cd->asid,PAGE_SIZE, false, smmu_domain);cosmetic nit: Please use braces for the multi-line conditionals.
Ack.
} arm_smmu_atc_inv_domain(smmu_domain, mm->pasid, start, size);}
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index dcab85698a4e..79a81eed1dcc 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -326,6 +326,15 @@ */ #define CMDQ_BATCH_ENTRIES BITS_PER_LONG
+/*
- Cloned from the MAX_TLBI_OPS in arch/arm64/include/asm/tlbflush.h, this
- is used as a threshold to replace per-page TLBI commands to issue in the
- command queue with an address-space TLBI command, when SMMU w/o a range
- invalidation feature handles too many per-page TLBI commands, which will
- otherwise result in a soft lockup.
- */
+#define CMDQ_MAX_TLBI_OPS (1 << (PAGE_SHIFT - 3))
Maybe stick "SVA" in the name of this somewhere, since that's the reason why looking at PAGE_SHIFT is relevant?
Hmm, that does make sense, yet it wouldn't apply to the non-SVA pathway, which makes putting it in the common header meaningless. Perhaps I should have just left it in arm-smmu-v3-sva.c file...
Meanwhile, we'd need to figure out another definition for non-SVA pathway.
Thanks Nicolin