From: Conor Dooley conor.dooley@microchip.com
Before ORing the new clock rate with the control register value read from the hardware, the existing clock rate needs to be masked off as otherwise the existing value will interfere with the new one.
CC: stable@vger.kernel.org Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers") Signed-off-by: Conor Dooley conor.dooley@microchip.com --- CC: Conor Dooley conor.dooley@microchip.com CC: Daire McNamara daire.mcnamara@microchip.com CC: Naga Sureshkumar Relli nagasuresh.relli@microchip.com CC: Mark Brown broonie@kernel.org CC: linux-spi@vger.kernel.org CC: linux-kernel@vger.kernel.org --- drivers/spi/spi-microchip-core-qspi.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c index 03d125a71fd9..09f16471c537 100644 --- a/drivers/spi/spi-microchip-core-qspi.c +++ b/drivers/spi/spi-microchip-core-qspi.c @@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi }
control = readl_relaxed(qspi->regs + REG_CONTROL); + control &= ~CONTROL_CLKRATE_MASK; control |= baud_rate_val << CONTROL_CLKRATE_SHIFT; writel_relaxed(control, qspi->regs + REG_CONTROL); control = readl_relaxed(qspi->regs + REG_CONTROL);