6.6-stable review patch. If anyone has any objections, please let me know.
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From: Satya Priya Kakitapalli quic_skakitap@quicinc.com
[ Upstream commit 3185f96968eedd117ec72ee7b87ead44b6d1bbbd ]
Add all the available resets for the video clock controller on sm8150.
Signed-off-by: Satya Priya Kakitapalli quic_skakitap@quicinc.com Acked-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20231201-videocc-8150-v3-1-56bec3a5e443@quicinc.co... Signed-off-by: Bjorn Andersson andersson@kernel.org Stable-dep-of: 1fd9a939db24 ("clk: qcom: videocc-sm8150: Update the videocc resets") Signed-off-by: Sasha Levin sashal@kernel.org --- include/dt-bindings/clock/qcom,videocc-sm8150.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/include/dt-bindings/clock/qcom,videocc-sm8150.h b/include/dt-bindings/clock/qcom,videocc-sm8150.h index e24ee840cfdb..c557b78dc572 100644 --- a/include/dt-bindings/clock/qcom,videocc-sm8150.h +++ b/include/dt-bindings/clock/qcom,videocc-sm8150.h @@ -16,6 +16,10 @@
/* VIDEO_CC Resets */ #define VIDEO_CC_MVSC_CORE_CLK_BCR 0 +#define VIDEO_CC_INTERFACE_BCR 1 +#define VIDEO_CC_MVS0_BCR 2 +#define VIDEO_CC_MVS1_BCR 3 +#define VIDEO_CC_MVSC_BCR 4
/* VIDEO_CC GDSCRs */ #define VENUS_GDSC 0