Re: [RESEND PATCH] clk: hi3660: Mark clk_gate_ufs_subsys as critical

Quoting Leo Yan (2019-03-19 02:31:48)

diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c index f40419959656..32ba80181cc6 100644 --- a/drivers/clk/hisilicon/clk-hi3660.c +++ b/drivers/clk/hisilicon/clk-hi3660.c @@ -164,7 +164,7 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = { { HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2", "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, }, { HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus",

•     CLK_SET_RATE_PARENT, 0x50, 21, 0, },
  

•     CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x50, 21, 0, },
  

Nitpick: Please add space around | and also comment in the code why this is a critical clk.

    { HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus",
      CLK_SET_RATE_PARENT, 0x50, 28, 0, },
    { HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",