From: Vignesh Raghavendra vigneshr@ti.com
[ Upstream commit a99705079a91e6373122bd0ca2fc129b688fc5b3 ]
Currently direct access mode is used on platforms that have AHB window (memory mapped window) larger than flash size. This feature is limited to TI platforms as non TI platforms have < 1MB of AHB window. Therefore introduce a driver quirk to disable DAC mode and set it for non TI compatibles. This is in preparation to move to spi-mem framework where flash geometry cannot be known.
Signed-off-by: Vignesh Raghavendra vigneshr@ti.com Reviewed-by: Tudor Ambarus tudor.ambarus@microchip.com Acked-by: Tudor Ambarus tudor.ambarus@microchip.com Link: https://lore.kernel.org/r/20200601070444.16923-3-vigneshr@ti.com Signed-off-by: Mark Brown broonie@kernel.org Stable-dep-of: 2087e85bb66e ("spi: cadence-quadspi: fix suspend-resume implementations") Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/mtd/spi-nor/cadence-quadspi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c index d680e4a272a13..7e7736bbbfb3b 100644 --- a/drivers/mtd/spi-nor/cadence-quadspi.c +++ b/drivers/mtd/spi-nor/cadence-quadspi.c @@ -34,6 +34,7 @@
/* Quirks */ #define CQSPI_NEEDS_WR_DELAY BIT(0) +#define CQSPI_DISABLE_DAC_MODE BIT(1)
/* Capabilities mask */ #define CQSPI_BASE_HWCAPS_MASK \ @@ -1257,7 +1258,8 @@ static int cqspi_setup_flash(struct cqspi_st *cqspi, struct device_node *np)
f_pdata->registered = true;
- if (mtd->size <= cqspi->ahb_size) { + if (mtd->size <= cqspi->ahb_size && + !(ddata->quirks & CQSPI_DISABLE_DAC_MODE)) { f_pdata->use_direct_mode = true; dev_dbg(nor->dev, "using direct mode for %s\n", mtd->name); @@ -1455,6 +1457,7 @@ static const struct dev_pm_ops cqspi__dev_pm_ops = {
static const struct cqspi_driver_platdata cdns_qspi = { .hwcaps_mask = CQSPI_BASE_HWCAPS_MASK, + .quirks = CQSPI_DISABLE_DAC_MODE, };
static const struct cqspi_driver_platdata k2g_qspi = {