On Mon, 21 Oct 2024 11:52:41 -0400, Frank Li wrote:
When enable initcall_debug together with higher debug level below. CONFIG_CONSOLE_LOGLEVEL_DEFAULT=9 CONFIG_CONSOLE_LOGLEVEL_QUIET=9 CONFIG_MESSAGE_LOGLEVEL_DEFAULT=7
The initialization of i.MX8MP PCIe PHY might be timeout failed randomly. To fix this issue, adjust the sequence of the resets refer to the power up sequence listed below.
[...]
Applied, thanks!
[1/1] phy: freescale: imx8m-pcie: Do CMN_RST just before PHY PLL lock check commit: f89263b69731e0144d275fff777ee0dd92069200
Best regards,