Re: [PATCH V2 1/1] serial: fsl_lpuart: zero out parity bit in CS7 mode

On Thu, Jul 14, 2022 at 01:58:58PM -0500, Shenwei Wang wrote:

The LPUART hardware doesn't zero out the parity bit on the received characters. This behavior won't impact the use cases of CS8 because the parity bit is the 9th bit which is not currently used by software. But the parity bit for CS7 must be zeroed out by software in order to get the correct raw data.

Signed-off-by: Shenwei Wang shenwei.wang@nxp.com

changes in v2

• remove the "inline" keyword from the function of lpuart_tty_insert_flip_string;

changes in v1

• fix the code indent and whitespace issue;

Please work with your email admins to fix up your systems as it is showing this is an invalid signature when validating it: ✗ BADSIG: DKIM/nxp.com

Soon I will just reject patches like this as you don't want people to impersonate your domain, right?

thanks,

greg k-h