From: Yoshihiro Shimoda yoshihiro.shimoda.uh@renesas.com
[ Upstream commit c588e1c9846b32182fd5a0ceb637b983810e7100 ]
Enable PCIe Host controller channel 0 on R-Car S4-8 Spider board.
Since this board has an Oculink connector, CLKREQ# pin of PFC for PCIe should not be used. So, using a GPIO is used to output the clock instead. Otherwise the controller cannot detect a PCIe device.
Signed-off-by: Yoshihiro Shimoda yoshihiro.shimoda.uh@renesas.com Reviewed-by: Geert Uytterhoeven geert+renesas@glider.be Link: https://lore.kernel.org/r/20230905012404.2915246-3-yoshihiro.shimoda.uh@rene... Signed-off-by: Geert Uytterhoeven geert+renesas@glider.be Signed-off-by: Sasha Levin sashal@kernel.org --- .../boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi index dd8e0e1595260..d959105f83bcc 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi @@ -33,6 +33,12 @@ memory@480000000 { reg = <0x4 0x80000000 0x0 0x80000000>; };
+ rc21012_pci: clk-rc21012-pci { + compatible = "fixed-clock"; + clock-frequency = <100000000>; + #clock-cells = <0>; + }; + rc21012_ufs: clk-rc21012-ufs { compatible = "fixed-clock"; clock-frequency = <38400000>; @@ -86,6 +92,12 @@ gpio_exp_20: gpio@20 { reg = <0x20>; gpio-controller; #gpio-cells = <2>; + + rc21012-gpio2-hog { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + output-high; + }; }; };
@@ -125,6 +137,18 @@ &mmc0 { status = "okay"; };
+&pcie0_clkref { + compatible = "gpio-gate-clock"; + clocks = <&rc21012_pci>; + enable-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; + /delete-property/ clock-frequency; +}; + +&pciec0 { + reset-gpio = <&gpio_exp_20 0 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + &pfc { pinctrl-0 = <&scif_clk_pins>; pinctrl-names = "default";