On Tue, Oct 29, 2024 at 05:54:10PM +0800, Chen-Yu Tsai wrote:
The IT6505 bridge chip has a active low reset line. Since it is a "reset" and not an "enable" line, the GPIO should be asserted to put it in reset and deasserted to bring it out of reset during the power on sequence.
The polarity was inverted when the driver was first introduced, likely because the device family that was targeted had an inverting level shifter on the reset line.
The MT8186 Corsola devices already have the IT6505 in their device tree, but the whole display pipeline is actually disabled and won't be enabled until some remaining issues are sorted out. The other known user is the MT8183 Kukui / Jacuzzi family; their device trees currently do not have the IT6505 included.
Fix the polarity in the driver while there are no actual users.
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver") Cc: stable@vger.kernel.org Signed-off-by: Chen-Yu Tsai wenst@chromium.org
drivers/gpu/drm/bridge/ite-it6505.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
The datasheet describes the pin as Active LOW, so the change seems to be correct.
Reviewed-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org