6.11-stable review patch. If anyone has any objections, please let me know.
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From: Fei Shao fshao@chromium.org
[ Upstream commit 6bb64877a41561bc78e0f4e9e04d524a0155d6aa ]
The T-PHY controller at 0x11e40000 controls two underlying USB2 and USB3 PHY ports. The USB3 port works normally just like the others, so there's no point in disabling it separately. Otherwise, board DTs would have to enable both the T-PHY controller and one of its sub-nodes in particular, which is slightly redundant and confusing.
Remove the status line in the u3port1 node, so it's ready to be used once the T-PHY controller is enabled.
Fixes: 9461e0caac9e ("arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefile") Signed-off-by: Fei Shao fshao@chromium.org Link: https://lore.kernel.org/r/20241021081311.543625-1-fshao@chromium.org Signed-off-by: AngeloGioacchino Del Regno angelogioacchino.delregno@collabora.com Signed-off-by: Sasha Levin sashal@kernel.org --- arch/arm64/boot/dts/mediatek/mt8188.dtsi | 1 - 1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8188.dtsi b/arch/arm64/boot/dts/mediatek/mt8188.dtsi index 041a85e1d9b55..b6193d73f688c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8188.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8188.dtsi @@ -1219,7 +1219,6 @@ u3port1: usb-phy@700 { <&clk26m>; clock-names = "ref", "da_ref"; #phy-cells = <1>; - status = "disabled"; }; };