Re: [PATCH 1/1] phy: tegra: xusb: Explicitly configure HS_DISCON_LEVEL to 0x7

On Fri, 12 Dec 2025 11:21:16 +0800, Wayne Chang wrote:

The USB2 Bias Pad Control register manages analog parameters for signal detection. Previously, the HS_DISCON_LEVEL relied on hardware reset values, which may lead to the detection failure.

Explicitly configure HS_DISCON_LEVEL to 0x7. This ensures the disconnect threshold is sufficient to guarantee reliable detection.

[...]

Applied, thanks!

[1/1] phy: tegra: xusb: Explicitly configure HS_DISCON_LEVEL to 0x7 commit: b246caa68037aa495390a60d080acaeb84f45fff

Best regards,