On Mon, Oct 27, 2025 at 04:34:54PM +0100, Emanuele Ghidoli wrote:
So, this needs to be tested - please modify phylib's genphy_c45_read_eee_cap1() to print the value read from the register.
If it is 0xffff, that confirms that theory.
It’s not 0xffff; I verified that the value read is: TI DP83867 stmmac-0:02: Reading EEE capabilities from MDIO_PCS_EEE_ABLE: 0x0006
Thanks for testing. So the published manual for this PHY is wrong. https://www.ti.com/lit/ds/symlink/dp83867ir.pdf page 64.
The comment I quoted from that page implies that the PCS and AN MMD registers shouldn't be implemented.
Given what we now know, I'd suggest TI PHYs are a mess. Stuff they say in the documentation that is ignored plainly isn't, and their PHYs report stuff as capable but their PHYs aren't capable.
I was suggesting to clear phydev->supported_eee, but that won't work if the MDIO_AN_EEE_ADV register is implemented even as far as exchanging EEE capabilities with the link partner. We use the supported_eee bitmap to know whether a register is implemented. Clearing ->supported_eee will mean we won't write to the advertisement register. That's risky. Given the brokenness so far, I wouldn't like to assume that the MDIO_AN_EEE_ADV register contains zero by default.
Calling phy_disable_eee() from .get_features() won't work, because after we call that method, of_set_phy_eee_broken() will then be called, which will clear phydev->eee_disabled_modes. I think that is a mistake. Is there any reason why we would want to clear the disabled modes? Isn't it already zero? (note that if OF_MDIO is disabled, or there's no DT node, we don't zero this.)
Your placement is the only possible location as the code currently stands, but I would like to suggest that of_set_phy_eee_broken() should _not_ be calling linkmode_zero(modes), and we should be able to set phydev->eee_disabled_modes in the .get_features() method.
Andrew, would you agree?