On Mon, Sep 08, 2025 at 11:03:31PM +0200, Linus Walleij wrote:
On Mon, Sep 8, 2025 at 9:14 PM Christian Marangi ansuelsmth@gmail.com wrote:
The usage of GPIO might be confusing but this is just to instruct the SoC to not mess with those 2 PIN and as Benjamin reported it's also an Errata of 7581. The FORCE_GPIO_EN doesn't set them as GPIO function (that is configured by a different register) but it's really to actually ""enable"" those lines.
Normally the SoC should autodetect this by HW but it seems AN7581 have problem with this and require this workaround to force enable the 2 pin.
In reply to Andrews comment I copied the two above paragraphs into the commit message in the applied patch.
Thanks for handling this and adding the extra info, I was about to send v2.