Hi Peter,
On Mon, 2018-07-09 at 17:53 +0300, Alexey Brodkin wrote:
Hi Peter,
On Mon, 2018-07-09 at 16:49 +0200, Peter Zijlstra wrote:
On Mon, Jul 09, 2018 at 02:33:26PM +0000, Alexey Brodkin wrote:
In fact, since alloc_dr() uses kmalloc() to allocate the entire thing, it is impossible to guarantee a larger alignment than kmalloc does.
Well but 4-bytes [which is critical for atomic64_t] should be much less than a sane cache line length so above should work.
AFAICT ARCH_KMALLOC_MINALIGN ends up being 4 on x86_32 (it doesn't define ARCH_DMA_MINALIGN and doesn't seem to otherwise override the thing).
So unconditionally setting the alignment of devres::data to 8 seems broken.
Well but then what other options do we have to fix a problem with misaligned access to atomic64_t in drm_gpu_scheduler?
Ping!
Should I send v4 with ARCH_KMALLOC_MINALIGN used for alignment if explicitly set __aligned__(8) will break x86_32?
-Alexey