RE: [PATCH] mfd: rz-mtu3: fix MTU5 NFCR register offset

Hi Cosmin,

Thanks for the patch.

-----Original Message----- From: Cosmin Tanislav cosmin-gabriel.tanislav.xa@renesas.com Sent: 10 September 2025 18:59 Subject: [PATCH] mfd: rz-mtu3: fix MTU5 NFCR register offset

The NFCR register for MTU5 is at 0x1a95 offset according to Datasheet Page 725, Table 16.4. The address of all registers is offset by 0x1200, making the proper address of MTU5 NFCR register be 0x895.

Cc: stable@vger.kernel.org Fixes: 654c293e1687 ("mfd: Add Renesas RZ/G2L MTU3a core driver") Signed-off-by: Cosmin Tanislav cosmin-gabriel.tanislav.xa@renesas.com

Reviewed-by: Biju Das biju.das.jz@bp.renesas.com

Cheers, Biju