17 Mar
2025
17 Mar
'25
9:45 p.m.
On Mon, Mar 17, 2025 at 06:32:50PM +0100, Marek Behún wrote:
Implement the workaround for erratum 3.3 RGMII timing may be out of spec when transmit delay is enabled for the 6320 family, which says:
When transmit delay is enabled via Port register 1 bit 14 = 1, duty cycle may be out of spec. Under very rare conditions this may cause the attached device receive CRC errors.
Signed-off-by: Marek Behún kabel@kernel.org Cc: stable@vger.kernel.org # 5.4.x
Reviewed-by: Andrew Lunn andrew@lunn.ch
Andrew