From: Imre Deak imre.deak@intel.com
commit 7962893ecb853aa7c8925ce237ab6c4274cfc1c7 upstream.
At least on some TGL platforms PUNIT wants to access some display HW registers, but it doesn't handle display power management (disabling DC states as required) and so this register access will lead to a hang. To prevent this disable runtime power management for poweroff and reboot.
v2: - Add code comment clarifying the requirement of display power states. (Ville)
Reported-and-tested-by: Khaled Almahallawy khaled.almahallawy@intel.com Signed-off-by: Imre Deak imre.deak@intel.com Reviewed-by: Khaled Almahallawy khaled.almahallawy@intel.com Reviewed-by: Ville Syrjälä ville.syrjala@linux.intel.com Link: https://patchwork.freedesktop.org/patch/msgid/20210127181909.128094-1-imre.d... Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org --- drivers/gpu/drm/i915/i915_drv.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
--- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1049,6 +1049,8 @@ static void intel_shutdown_encoders(stru void i915_driver_shutdown(struct drm_i915_private *i915) { disable_rpm_wakeref_asserts(&i915->runtime_pm); + intel_runtime_pm_disable(&i915->runtime_pm); + intel_power_domains_disable(i915);
i915_gem_suspend(i915);
@@ -1064,7 +1066,15 @@ void i915_driver_shutdown(struct drm_i91 intel_suspend_encoders(i915); intel_shutdown_encoders(i915);
+ /* + * The only requirement is to reboot with display DC states disabled, + * for now leaving all display power wells in the INIT power domain + * enabled matching the driver reload sequence. + */ + intel_power_domains_driver_remove(i915); enable_rpm_wakeref_asserts(&i915->runtime_pm); + + intel_runtime_pm_driver_release(&i915->runtime_pm); }
static bool suspend_to_idle(struct drm_i915_private *dev_priv)