Hi Greg, everyone,
unfortunately, this patch introduced a regression on rk356x boards, as the current DTS is missing the reset names. This was pointed out in 6.12 series by Chukun Pan [1], it applies here as well. Real world examples of breakages are M.2 NVMe on ODROID-M1S [2] and USB 3 ports on ODROID-M1 [3]. This patch shouldn't have been applied without the device tree change or extra fallback code, as suggested in the discussion for Chukun's original commits [4]. Version 6.6.74 is still affected by the bug.
Regards, Jan
[1] https://lore.kernel.org/stable/20241231021010.17792-1-amadeus@jmu.edu.cn/ [2] https://github.com/home-assistant/operating-system/issues/3837 [3] https://github.com/home-assistant/operating-system/issues/3841 [4] https://lore.kernel.org/all/20250103033016.79544-1-amadeus@jmu.edu.cn/
#regzbot introduced: v6.6.68..v6.6.69
On 30. 12. 24 16:42, Greg Kroah-Hartman wrote:
6.6-stable review patch. If anyone has any objections, please let me know.
From: Chukun Pan amadeus@jmu.edu.cn
commit fbcbffbac994aca1264e3c14da96ac9bfd90466e upstream.
Currently, the USB port via combophy on the RK3528/RK3588 SoC is broken.
usb usb8-port1: Cannot enable. Maybe the USB cable is bad?
This is due to the combphy of RK3528/RK3588 SoC has multiple resets, but only "phy resets" need assert and deassert, "apb resets" don't need. So change the driver to only match the phy resets, which is also what the vendor kernel does.
Fixes: 7160820d742a ("phy: rockchip: add naneng combo phy for RK3568") Cc: FUKAUMI Naoki naoki@radxa.com Cc: Michael Zimmermann sigmaepsilon92@gmail.com Signed-off-by: Chukun Pan amadeus@jmu.edu.cn Reviewed-by: Heiko Stuebner heiko@sntech.de Tested-by: FUKAUMI Naoki naoki@radxa.com Link: https://lore.kernel.org/r/20241122073006.99309-2-amadeus@jmu.edu.cn Signed-off-by: Vinod Koul vkoul@kernel.org Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -309,7 +309,7 @@ static int rockchip_combphy_parse_dt(str priv->ext_refclk = device_property_present(dev, "rockchip,ext-refclk");
- priv->phy_rst = devm_reset_control_array_get_exclusive(dev);
- priv->phy_rst = devm_reset_control_get(dev, "phy"); if (IS_ERR(priv->phy_rst)) return dev_err_probe(dev, PTR_ERR(priv->phy_rst), "failed to get phy reset\n");