Re: [PATCH 5.9 14/49] net: stmmac: dwmac-meson8b: fix mask definition of the m250_sel mux

Hi!

From: Martin Blumenstingl martin.blumenstingl@googlemail.com

[ Upstream commit 82ca4c922b8992013a238d65cf4e60cc33e12f36 ]

The m250_sel mux clock uses bit 4 in the PRG_ETH0 register. Fix this by shifting the PRG_ETH0_CLK_M250_SEL_MASK accordingly as the "mask" in struct clk_mux expects the mask relative to the "shift" field in the same struct.

While here, get rid of the PRG_ETH0_CLK_M250_SEL_SHIFT macro and use __ffs() to determine it from the existing PRG_ETH0_CLK_M250_SEL_MASK macro.

I can't say I like this one:

clk_configs->m250_mux.reg = dwmac->regs + PRG_ETH0;

• clk_configs->m250_mux.shift = PRG_ETH0_CLK_M250_SEL_SHIFT;
• clk_configs->m250_mux.mask = PRG_ETH0_CLK_M250_SEL_MASK;

• clk_configs->m250_mux.shift = __ffs(PRG_ETH0_CLK_M250_SEL_MASK);

It replaces constant with computation done at runtime; compiler can't optimize it as __ffs is implemented with asm().

Best regards, Pavel