6.10-stable review patch. If anyone has any objections, please let me know.
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From: Victor Lu victorchengchi.lu@amd.com
[ Upstream commit b32563859d6f61265222ec0f27d394964a8f7669 ]
SRIOV does not need to wait for IFWI init, and MP0_C2PMSG_33 is blocked for VF access.
Signed-off-by: Victor Lu victorchengchi.lu@amd.com Reviewed-by: Vignesh Chander Vignesh.Chander@amd.com Signed-off-by: Alex Deucher alexander.deucher@amd.com Stable-dep-of: 9cead81eff63 ("drm/amdgpu: fix eGPU hotplug regression") Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 26 ++++++++++--------- 1 file changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c index 0e31bdb4b7cb6..ea5223388cff2 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c @@ -256,19 +256,21 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev, u32 msg; int i, ret = 0;
- /* It can take up to a second for IFWI init to complete on some dGPUs, - * but generally it should be in the 60-100ms range. Normally this starts - * as soon as the device gets power so by the time the OS loads this has long - * completed. However, when a card is hotplugged via e.g., USB4, we need to - * wait for this to complete. Once the C2PMSG is updated, we can - * continue. - */ + if (!amdgpu_sriov_vf(adev)) { + /* It can take up to a second for IFWI init to complete on some dGPUs, + * but generally it should be in the 60-100ms range. Normally this starts + * as soon as the device gets power so by the time the OS loads this has long + * completed. However, when a card is hotplugged via e.g., USB4, we need to + * wait for this to complete. Once the C2PMSG is updated, we can + * continue. + */
- for (i = 0; i < 1000; i++) { - msg = RREG32(mmMP0_SMN_C2PMSG_33); - if (msg & 0x80000000) - break; - usleep_range(1000, 1100); + for (i = 0; i < 1000; i++) { + msg = RREG32(mmMP0_SMN_C2PMSG_33); + if (msg & 0x80000000) + break; + usleep_range(1000, 1100); + } }
vram_size = (uint64_t)RREG32(mmRCC_CONFIG_MEMSIZE) << 20;