From: George Moussalem george.moussalem@outlook.com
[ Upstream commit 693a723291d0634eaea24cff2f9d807f3223f204 ]
The XO clock must not be disabled to avoid the kernel trying to disable the it. As such, keep the XO clock always on by flagging it as critical.
Signed-off-by: George Moussalem george.moussalem@outlook.com Reviewed-by: Konrad Dybcio konrad.dybcio@oss.qualcomm.com Link: https://lore.kernel.org/r/20250516-ipq5018-cmn-pll-v4-1-389a6b30e504@outlook... Signed-off-by: Bjorn Andersson andersson@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org ---
LLM Generated explanations, may be completely bogus:
Based on my analysis of the commit and the kernel repository context, here's my assessment:
**Backport Status: YES**
## Extensive Explanation:
This commit should be backported to stable kernel trees for the following reasons:
### 1. **Critical Bug Fix** The commit fixes a critical issue where the XO (crystal oscillator) clock could be disabled by the kernel's clock framework. The XO clock is fundamental to the SoC's operation - it's the primary reference clock that drives many other clocks in the system. The commit message explicitly states "The XO clock must not be disabled to avoid the kernel trying to disable it."
### 2. **Small and Contained Change** The code change is minimal - only adding the `CLK_IS_CRITICAL` flag to line 1374: ```c .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ``` This is a one-line change that only affects the `gcc_xo_clk` structure initialization. It doesn't modify any logic, algorithms, or introduce new features.
### 3. **Clear Problem and Solution** The problem is straightforward: without the `CLK_IS_CRITICAL` flag, the clock framework may attempt to disable the XO clock when it appears unused, which could cause system instability or crashes on IPQ5018 platforms. The solution is equally clear: marking the clock as critical prevents it from ever being disabled.
### 4. **Pattern Established in Other Qualcomm Drivers** From the git history analysis, I can see similar patterns where critical clocks are marked with `CLK_IS_CRITICAL` in other Qualcomm clock drivers (gcc-sm7150.c, gcc-qcm2290.c, gcc-sm6375.c, etc.). This is a well- established practice for clocks that must remain always-on.
### 5. **Platform-Specific Fix with No Side Effects** This change only affects the IPQ5018 platform and has no impact on other SoCs or subsystems. The modification is contained within the platform- specific driver file `gcc-ipq5018.c`.
### 6. **Potential System Stability Impact** Without this fix, IPQ5018-based systems could experience: - Random crashes when the clock framework attempts to disable the XO clock - System hangs or freezes - Unpredictable behavior when power management features are active
### 7. **Recent Driver with Active Bug Fixes** Looking at the commit history for gcc-ipq5018.c, there have been several recent bug fixes: - `f6a4a55ae5d9` - fix GE PHY reset - `7d474b43087a` - fix register offset for GCC_UBI0_AXI_ARES reset - `11b752ac5a07` - fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk' - `f982adcc1b1c` - fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
This indicates the driver is still being stabilized, and this XO clock fix is part of that stabilization effort.
### 8. **No Architectural Changes** The commit doesn't introduce any architectural changes or new features. It's purely a bug fix that ensures correct hardware behavior by preventing an essential clock from being disabled.
The commit meets all the criteria for stable backporting: it fixes an important bug that affects users, is small and contained, has minimal risk of regression, and doesn't introduce new features or architectural changes.
drivers/clk/qcom/gcc-ipq5018.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c index 70f5dcb96700..24eb4c40da63 100644 --- a/drivers/clk/qcom/gcc-ipq5018.c +++ b/drivers/clk/qcom/gcc-ipq5018.c @@ -1371,7 +1371,7 @@ static struct clk_branch gcc_xo_clk = { &gcc_xo_clk_src.clkr.hw, }, .num_parents = 1, - .flags = CLK_SET_RATE_PARENT, + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, .ops = &clk_branch2_ops, }, },