6.17-stable review patch. If anyone has any objections, please let me know.
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From: Loic Poulain loic.poulain@oss.qualcomm.com
[ Upstream commit e645096d1f6dadcead09c722a3fbc6c44a45fece ]
Add Camera Control Interface (CCI), supporting two I2C masters.
Signed-off-by: Loic Poulain loic.poulain@oss.qualcomm.com Reviewed-by: Konrad Dybcio konrad.dybcio@oss.qualcomm.com Link: https://lore.kernel.org/r/20250911212102.470886-2-loic.poulain@oss.qualcomm.... Signed-off-by: Bjorn Andersson andersson@kernel.org Stable-dep-of: 67445dc8a806 ("arm64: dts: qcom: qcm2290: Fix camss register prop ordering") Signed-off-by: Sasha Levin sashal@kernel.org --- arch/arm64/boot/dts/qcom/qcm2290.dtsi | 50 +++++++++++++++++++++++++++ 1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi index 6b7070dad3df9..4613713124f77 100644 --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi @@ -565,6 +565,20 @@ qup_uart4_default: qup-uart4-default-state { bias-disable; };
+ cci0_default: cci0-default-state { + pins = "gpio22", "gpio23"; + function = "cci_i2c"; + drive-strength = <2>; + bias-disable; + }; + + cci1_default: cci1-default-state { + pins = "gpio29", "gpio30"; + function = "cci_i2c"; + drive-strength = <2>; + bias-disable; + }; + sdc1_state_on: sdc1-on-state { clk-pins { pins = "sdc1_clk"; @@ -1629,6 +1643,42 @@ adreno_smmu: iommu@59a0000 { #iommu-cells = <2>; };
+ cci: cci@5c1b000 { + compatible = "qcom,qcm2290-cci", "qcom,msm8996-cci"; + reg = <0x0 0x5c1b000 0x0 0x1000>; + + interrupts = <GIC_SPI 206 IRQ_TYPE_EDGE_RISING>; + + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, <&gcc GCC_CAMSS_CCI_0_CLK>; + clock-names = "ahb", "cci"; + assigned-clocks = <&gcc GCC_CAMSS_CCI_0_CLK>; + assigned-clock-rates = <37500000>; + + power-domains = <&gcc GCC_CAMSS_TOP_GDSC>; + + pinctrl-0 = <&cci0_default &cci1_default>; + pinctrl-names = "default"; + + #address-cells = <1>; + #size-cells = <0>; + + status = "disabled"; + + cci_i2c0: i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg = <1>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + camss: camss@5c6e000 { compatible = "qcom,qcm2290-camss";