On Mon, Feb 18, 2019 at 09:16:03PM -0800, Bjorn Andersson wrote:
On Wed 13 Feb 07:23 PST 2019, Lorenzo Pieralisi wrote:
On Fri, Jan 25, 2019 at 03:26:16PM -0800, Bjorn Andersson wrote:
Acquiring the reset GPIO low means that reset is being deasserted, this is followed almost immediately with qcom_pcie_host_init() asserting it, initializing it and then finally deasserting it again, for the link to come up.
Some PCIe devices requires a minimum time between the initial deassert and subsequent reset cycles. In a platform that boots with the reset GPIO asserted this requirement is being violated by this deassert/assert pulse.
Acquiring the reset GPIO high will prevent this by matching the state to the subsequent asserted state.
Cc: stable@vger.kernel.org
Missing Fixes: tag, please provide me one so that I can proceed.
This applies to the original commit introducing this driver, so:
Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Applied to pci/dwc for v5.1, thanks.
Lorenzo