On Thu, Sep 22, 2022 at 09:42:15PM +0200, Andreas Mohr wrote:
So one can see where my profiling effort went (*optimizing* things, not degrading them) --> hints that current Zen3-originating effort is not about a regression in the "regression bug" sense - merely a (albeit rather appreciable/sizeable... congrats!) performance deterioration vs. an optimal (currently non-achieved) software implementation state (also: of PORT-based handling [vs. MWAIT], mind you!).
I'd like to add a word of caution here:
AFAIK power management (here: ACPI Cx) handling generally is about a painful *tradeoff* between achieving best-possible performance (that's the respectable Zen3 32MB/s vs. 33MB/s argument) and achieving maximum power savings. We all know that one can configure the system for non-idle mode (idle=poll cmdline?) and achieve record numbers in performance (...*and* power consumption - ouch!).
Current decision/implementation aspects AFAICS: - why is the Zen3 config used here choosing less-favourable(?) PORT-based operation mode? - Zen3 is said to not have the STPCLK# issue (- but then what about other more modern chipsets?)
--> we need to achieve (hopefully sufficiently precisely) a solution which takes into account Zen3 STPCLK# improvements while preserving "accepted" behaviour/requirements on *all* STPCLK#-hampered chipsets ("STPCLK# I/O wait is default/traditional handling"?).
Greetings
Andreas Mohr