6.10-stable review patch. If anyone has any objections, please let me know.
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From: Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com
[ Upstream commit a3a632ed87f0913779092c30bd0ea7dfd81601f3 ]
On RZ/V2H(P) SoC, the power registers for SD and ETH do not exist, resulting in invalid register offsets. Ensure that the register offsets are valid before any read/write operations are performed. If the power registers are not available, both SD and ETH will be set to '0'.
Signed-off-by: Lad Prabhakar prabhakar.mahadev-lad.rj@bp.renesas.com Reviewed-by: Geert Uytterhoeven geert+renesas@glider.be Tested-by: Claudiu Beznea claudiu.beznea.uj@bp.renesas.com # on RZ/G3S Link: https://lore.kernel.org/r/20240530173857.164073-7-prabhakar.mahadev-lad.rj@b... Signed-off-by: Geert Uytterhoeven geert+renesas@glider.be Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c index 60be78da9f52..389602e4d7ab 100644 --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c @@ -2583,8 +2583,10 @@ static int rzg2l_pinctrl_suspend_noirq(struct device *dev) rzg2l_pinctrl_pm_setup_dedicated_regs(pctrl, true);
for (u8 i = 0; i < 2; i++) { - cache->sd_ch[i] = readb(pctrl->base + SD_CH(regs->sd_ch, i)); - cache->eth_poc[i] = readb(pctrl->base + ETH_POC(regs->eth_poc, i)); + if (regs->sd_ch) + cache->sd_ch[i] = readb(pctrl->base + SD_CH(regs->sd_ch, i)); + if (regs->eth_poc) + cache->eth_poc[i] = readb(pctrl->base + ETH_POC(regs->eth_poc, i)); }
cache->qspi = readb(pctrl->base + QSPI); @@ -2615,8 +2617,10 @@ static int rzg2l_pinctrl_resume_noirq(struct device *dev) writeb(cache->qspi, pctrl->base + QSPI); writeb(cache->eth_mode, pctrl->base + ETH_MODE); for (u8 i = 0; i < 2; i++) { - writeb(cache->sd_ch[i], pctrl->base + SD_CH(regs->sd_ch, i)); - writeb(cache->eth_poc[i], pctrl->base + ETH_POC(regs->eth_poc, i)); + if (regs->sd_ch) + writeb(cache->sd_ch[i], pctrl->base + SD_CH(regs->sd_ch, i)); + if (regs->eth_poc) + writeb(cache->eth_poc[i], pctrl->base + ETH_POC(regs->eth_poc, i)); }
rzg2l_pinctrl_pm_setup_pfc(pctrl);