Return values from read_dt_param() will be either TRUE (1) or FALSE (0), while dfll_fetch_pwm_params() returns 0 on success or an ERR code on failure.
So this patch fixes the bug of returning 0 on failure.
Fixes: 36541f0499fe ("clk: tegra: dfll: support PWM regulator control") Cc: stable@vger.kernel.org Signed-off-by: Nicolin Chen nicoleotsuka@gmail.com --- drivers/clk/tegra/clk-dfll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/tegra/clk-dfll.c b/drivers/clk/tegra/clk-dfll.c index cfbaa90c7adb..a5f526bb0483 100644 --- a/drivers/clk/tegra/clk-dfll.c +++ b/drivers/clk/tegra/clk-dfll.c @@ -1856,13 +1856,13 @@ static int dfll_fetch_pwm_params(struct tegra_dfll *td) &td->reg_init_uV); if (!ret) { dev_err(td->dev, "couldn't get initialized voltage\n"); - return ret; + return -EINVAL; }
ret = read_dt_param(td, "nvidia,pwm-period-nanoseconds", &pwm_period); if (!ret) { dev_err(td->dev, "couldn't get PWM period\n"); - return ret; + return -EINVAL; } td->pwm_rate = (NSEC_PER_SEC / pwm_period) * (MAX_DFLL_VOLTAGES - 1);
On Wed, Oct 28, 2020 at 05:48:20PM -0700, Nicolin Chen wrote:
Return values from read_dt_param() will be either TRUE (1) or FALSE (0), while dfll_fetch_pwm_params() returns 0 on success or an ERR code on failure.
So this patch fixes the bug of returning 0 on failure.
Fixes: 36541f0499fe ("clk: tegra: dfll: support PWM regulator control") Cc: stable@vger.kernel.org Signed-off-by: Nicolin Chen nicoleotsuka@gmail.com
drivers/clk/tegra/clk-dfll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Mike, Stephen,
if you don't mind, I'll pick this up in the Tegra tree since there are a few other Tegra clock patches on the list that may require coordination inside the Tegra tree.
Thierry
On Fri, Nov 20, 2020 at 05:16:56PM +0100, Thierry Reding wrote:
On Wed, Oct 28, 2020 at 05:48:20PM -0700, Nicolin Chen wrote:
Return values from read_dt_param() will be either TRUE (1) or FALSE (0), while dfll_fetch_pwm_params() returns 0 on success or an ERR code on failure.
So this patch fixes the bug of returning 0 on failure.
Fixes: 36541f0499fe ("clk: tegra: dfll: support PWM regulator control") Cc: stable@vger.kernel.org Signed-off-by: Nicolin Chen nicoleotsuka@gmail.com
drivers/clk/tegra/clk-dfll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Mike, Stephen,
if you don't mind, I'll pick this up in the Tegra tree since there are a few other Tegra clock patches on the list that may require coordination inside the Tegra tree.
Also, I do plan on sending the collected set of patches to you for inclusion via PR at a later date, if that's okay with you.
Thierry
Quoting Thierry Reding (2020-11-20 08:18:39)
On Fri, Nov 20, 2020 at 05:16:56PM +0100, Thierry Reding wrote:
On Wed, Oct 28, 2020 at 05:48:20PM -0700, Nicolin Chen wrote:
Return values from read_dt_param() will be either TRUE (1) or FALSE (0), while dfll_fetch_pwm_params() returns 0 on success or an ERR code on failure.
So this patch fixes the bug of returning 0 on failure.
Fixes: 36541f0499fe ("clk: tegra: dfll: support PWM regulator control") Cc: stable@vger.kernel.org Signed-off-by: Nicolin Chen nicoleotsuka@gmail.com
drivers/clk/tegra/clk-dfll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Mike, Stephen,
if you don't mind, I'll pick this up in the Tegra tree since there are a few other Tegra clock patches on the list that may require coordination inside the Tegra tree.
Also, I do plan on sending the collected set of patches to you for inclusion via PR at a later date, if that's okay with you.
Ok sure.
linux-stable-mirror@lists.linaro.org