Some Coffee Lake platforms have skewed HPET timer once the SoCs entered PC10, and marked TSC as unstable clocksource as result.
Harry Pan identified it's a firmware bug [1].
To prevent creating a circular dependency between HPET and TSC, let's disable HPET on affected platforms.
[1]: https://lore.kernel.org/lkml/20190516090651.1396-1-harry.pan@intel.com/ Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203183
Cc: stable@vger.kernel.org Suggested-by: Feng Tang feng.tang@intel.com Signed-off-by: Kai-Heng Feng kai.heng.feng@canonical.com --- arch/x86/kernel/early-quirks.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 6f6b1d04dadf..4cba91ec8049 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c @@ -710,6 +710,8 @@ static struct chipset early_qrk[] __initdata = { */ { PCI_VENDOR_ID_INTEL, 0x0f00, PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, + { PCI_VENDOR_ID_INTEL, 0x3ec4, + PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, { PCI_VENDOR_ID_BROADCOM, 0x4331, PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset}, {}
Hi Thomas,
On Oct 16, 2019, at 18:38, Kai-Heng Feng kai.heng.feng@canonical.com wrote:
Some Coffee Lake platforms have skewed HPET timer once the SoCs entered PC10, and marked TSC as unstable clocksource as result.
Harry Pan identified it's a firmware bug [1].
To prevent creating a circular dependency between HPET and TSC, let's disable HPET on affected platforms.
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203183
Do you think it's a sane approach?
Kai-Heng
Cc: stable@vger.kernel.org Suggested-by: Feng Tang feng.tang@intel.com Signed-off-by: Kai-Heng Feng kai.heng.feng@canonical.com
arch/x86/kernel/early-quirks.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 6f6b1d04dadf..4cba91ec8049 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c @@ -710,6 +710,8 @@ static struct chipset early_qrk[] __initdata = { */ { PCI_VENDOR_ID_INTEL, 0x0f00, PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
- { PCI_VENDOR_ID_INTEL, 0x3ec4,
{ PCI_VENDOR_ID_BROADCOM, 0x4331, PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset}, {}PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
-- 2.17.1
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: fc5db58539b49351e76f19817ed1102bf7c712d0 Gitweb: https://git.kernel.org/tip/fc5db58539b49351e76f19817ed1102bf7c712d0 Author: Kai-Heng Feng kai.heng.feng@canonical.com AuthorDate: Wed, 16 Oct 2019 18:38:16 +08:00 Committer: Thomas Gleixner tglx@linutronix.de CommitterDate: Tue, 12 Nov 2019 15:55:20 +01:00
x86/quirks: Disable HPET on Intel Coffe Lake platforms
Some Coffee Lake platforms have a skewed HPET timer once the SoCs entered PC10, which in consequence marks TSC as unstable because HPET is used as watchdog clocksource for TSC.
Harry Pan tried to work around it in the clocksource watchdog code [1] thereby creating a circular dependency between HPET and TSC. This also ignores the fact, that HPET is not only unsuitable as watchdog clocksource on these systems, it becomes unusable in general.
Disable HPET on affected platforms.
Suggested-by: Feng Tang feng.tang@intel.com Signed-off-by: Kai-Heng Feng kai.heng.feng@canonical.com Signed-off-by: Thomas Gleixner tglx@linutronix.de Cc: stable@vger.kernel.org Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203183 Link: https://lore.kernel.org/lkml/20190516090651.1396-1-harry.pan@intel.com/ [1] Link: https://lkml.kernel.org/r/20191016103816.30650-1-kai.heng.feng@canonical.com --- arch/x86/kernel/early-quirks.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c index 6f6b1d0..4cba91e 100644 --- a/arch/x86/kernel/early-quirks.c +++ b/arch/x86/kernel/early-quirks.c @@ -710,6 +710,8 @@ static struct chipset early_qrk[] __initdata = { */ { PCI_VENDOR_ID_INTEL, 0x0f00, PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, + { PCI_VENDOR_ID_INTEL, 0x3ec4, + PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, { PCI_VENDOR_ID_BROADCOM, 0x4331, PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset}, {}
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