Fix broken config in qcom_param_page_type_exec caused by copy-paste error from commit 0c08080fd71c ("mtd: rawnand: qcom: use FIELD_PREP and GENMASK")
In qcom_param_page_type_exec the value needs to be set to nandc->regs->cfg0 instead of host->cfg0. This wrong configuration caused the Qcom NANDC driver to malfunction on any device that makes use of it (IPQ806x, IPQ40xx, IPQ807x, IPQ60xx) with the following error:
[ 0.885369] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xaa [ 0.885909] nand: Micron NAND 256MiB 1,8V 8-bit [ 0.892499] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 0.896823] nand: ECC (step, strength) = (512, 8) does not fit in OOB [ 0.896836] qcom-nandc 79b0000.nand-controller: No valid ECC settings possible [ 0.910996] bam-dma-engine 7984000.dma-controller: Cannot free busy channel [ 0.918070] qcom-nandc: probe of 79b0000.nand-controller failed with error -28
Restore original configuration fix the problem and makes the driver work again.
Cc: stable@vger.kernel.org Fixes: 0c08080fd71c ("mtd: rawnand: qcom: use FIELD_PREP and GENMASK") Signed-off-by: Christian Marangi ansuelsmth@gmail.com --- drivers/mtd/nand/raw/qcom_nandc.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c index d2d2aeee42a7..4e3a3e049d9d 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -1881,18 +1881,18 @@ static int qcom_param_page_type_exec(struct nand_chip *chip, const struct nand_ nandc->regs->addr0 = 0; nandc->regs->addr1 = 0;
- host->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) | - FIELD_PREP(UD_SIZE_BYTES_MASK, 512) | - FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) | - FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0); - - host->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) | - FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) | - FIELD_PREP(CS_ACTIVE_BSY, 0) | - FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) | - FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) | - FIELD_PREP(WIDE_FLASH, 0) | - FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1); + nandc->regs->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) | + FIELD_PREP(UD_SIZE_BYTES_MASK, 512) | + FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) | + FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0); + + nandc->regs->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) | + FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) | + FIELD_PREP(CS_ACTIVE_BSY, 0) | + FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) | + FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) | + FIELD_PREP(WIDE_FLASH, 0) | + FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1);
if (!nandc->props->qpic_version2) nandc->regs->ecc_buf_cfg = cpu_to_le32(ECC_CFG_ECC_DISABLE);
On 07. 02. 2025. 20:54, Christian Marangi wrote:
Fix broken config in qcom_param_page_type_exec caused by copy-paste error from commit 0c08080fd71c ("mtd: rawnand: qcom: use FIELD_PREP and GENMASK")
In qcom_param_page_type_exec the value needs to be set to nandc->regs->cfg0 instead of host->cfg0. This wrong configuration caused the Qcom NANDC driver to malfunction on any device that makes use of it (IPQ806x, IPQ40xx, IPQ807x, IPQ60xx) with the following error:
[ 0.885369] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xaa [ 0.885909] nand: Micron NAND 256MiB 1,8V 8-bit [ 0.892499] nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64 [ 0.896823] nand: ECC (step, strength) = (512, 8) does not fit in OOB [ 0.896836] qcom-nandc 79b0000.nand-controller: No valid ECC settings possible [ 0.910996] bam-dma-engine 7984000.dma-controller: Cannot free busy channel [ 0.918070] qcom-nandc: probe of 79b0000.nand-controller failed with error -28
Restore original configuration fix the problem and makes the driver work again.
Cc: stable@vger.kernel.org Fixes: 0c08080fd71c ("mtd: rawnand: qcom: use FIELD_PREP and GENMASK") Signed-off-by: Christian Marangi ansuelsmth@gmail.com
Tested-by: Robert Marko robimarko@gmail.com #IPQ8074 and IPQ6018
drivers/mtd/nand/raw/qcom_nandc.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c index d2d2aeee42a7..4e3a3e049d9d 100644 --- a/drivers/mtd/nand/raw/qcom_nandc.c +++ b/drivers/mtd/nand/raw/qcom_nandc.c @@ -1881,18 +1881,18 @@ static int qcom_param_page_type_exec(struct nand_chip *chip, const struct nand_ nandc->regs->addr0 = 0; nandc->regs->addr1 = 0;
- host->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) |
FIELD_PREP(UD_SIZE_BYTES_MASK, 512) |FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);- host->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |
FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |FIELD_PREP(CS_ACTIVE_BSY, 0) |FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) |FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) |FIELD_PREP(WIDE_FLASH, 0) |FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1);
- nandc->regs->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) |
FIELD_PREP(UD_SIZE_BYTES_MASK, 512) |FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);- nandc->regs->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |
FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |FIELD_PREP(CS_ACTIVE_BSY, 0) |FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) |FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) |FIELD_PREP(WIDE_FLASH, 0) |FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1);if (!nandc->props->qpic_version2) nandc->regs->ecc_buf_cfg = cpu_to_le32(ECC_CFG_ECC_DISABLE);
Hi Christian,
kernel test robot noticed the following build warnings:
[auto build test WARNING on mtd/nand/next] [also build test WARNING on mani-mhi/mhi-next linus/master v6.14-rc1 next-20250207] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Christian-Marangi/mtd-rawnand... base: https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git nand/next patch link: https://lore.kernel.org/r/20250207195442.19157-1-ansuelsmth%40gmail.com patch subject: [PATCH] mtd: rawnand: qcom: fix broken config in qcom_param_page_type_exec config: sh-randconfig-r133-20250208 (https://download.01.org/0day-ci/archive/20250209/202502090258.EVrsPFF7-lkp@i...) compiler: sh4-linux-gcc (GCC) 14.2.0 reproduce: (https://download.01.org/0day-ci/archive/20250209/202502090258.EVrsPFF7-lkp@i...)
If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot lkp@intel.com | Closes: https://lore.kernel.org/oe-kbuild-all/202502090258.EVrsPFF7-lkp@intel.com/
sparse warnings: (new ones prefixed by >>)
drivers/mtd/nand/raw/qcom_nandc.c:1884:27: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 [usertype] cfg0 @@ got unsigned long @@
drivers/mtd/nand/raw/qcom_nandc.c:1884:27: sparse: expected restricted __le32 [usertype] cfg0 drivers/mtd/nand/raw/qcom_nandc.c:1884:27: sparse: got unsigned long
drivers/mtd/nand/raw/qcom_nandc.c:1889:27: sparse: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 [usertype] cfg1 @@ got unsigned long @@
drivers/mtd/nand/raw/qcom_nandc.c:1889:27: sparse: expected restricted __le32 [usertype] cfg1 drivers/mtd/nand/raw/qcom_nandc.c:1889:27: sparse: got unsigned long
vim +1884 drivers/mtd/nand/raw/qcom_nandc.c
1857 1858 static int qcom_param_page_type_exec(struct nand_chip *chip, const struct nand_subop *subop) 1859 { 1860 struct qcom_nand_host *host = to_qcom_nand_host(chip); 1861 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); 1862 struct qcom_op q_op = {}; 1863 const struct nand_op_instr *instr = NULL; 1864 unsigned int op_id = 0; 1865 unsigned int len = 0; 1866 int ret; 1867 1868 ret = qcom_parse_instructions(chip, subop, &q_op); 1869 if (ret) 1870 return ret; 1871 1872 q_op.cmd_reg |= cpu_to_le32(PAGE_ACC | LAST_PAGE); 1873 1874 nandc->buf_count = 0; 1875 nandc->buf_start = 0; 1876 host->use_ecc = false; 1877 qcom_clear_read_regs(nandc); 1878 qcom_clear_bam_transaction(nandc); 1879 1880 nandc->regs->cmd = q_op.cmd_reg; 1881 nandc->regs->addr0 = 0; 1882 nandc->regs->addr1 = 0; 1883
1884 nandc->regs->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) |
1885 FIELD_PREP(UD_SIZE_BYTES_MASK, 512) | 1886 FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) | 1887 FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0); 1888
1889 nandc->regs->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |
1890 FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) | 1891 FIELD_PREP(CS_ACTIVE_BSY, 0) | 1892 FIELD_PREP(BAD_BLOCK_IN_SPARE_AREA, 1) | 1893 FIELD_PREP(WR_RD_BSY_GAP_MASK, 2) | 1894 FIELD_PREP(WIDE_FLASH, 0) | 1895 FIELD_PREP(DEV0_CFG1_ECC_DISABLE, 1); 1896 1897 if (!nandc->props->qpic_version2) 1898 nandc->regs->ecc_buf_cfg = cpu_to_le32(ECC_CFG_ECC_DISABLE); 1899 1900 /* configure CMD1 and VLD for ONFI param probing in QPIC v1 */ 1901 if (!nandc->props->qpic_version2) { 1902 nandc->regs->vld = cpu_to_le32((nandc->vld & ~READ_START_VLD)); 1903 nandc->regs->cmd1 = cpu_to_le32((nandc->cmd1 & ~(0xFF << READ_ADDR)) 1904 | NAND_CMD_PARAM << READ_ADDR); 1905 } 1906 1907 nandc->regs->exec = cpu_to_le32(1); 1908 1909 if (!nandc->props->qpic_version2) { 1910 nandc->regs->orig_cmd1 = cpu_to_le32(nandc->cmd1); 1911 nandc->regs->orig_vld = cpu_to_le32(nandc->vld); 1912 } 1913 1914 instr = q_op.data_instr; 1915 op_id = q_op.data_instr_idx; 1916 len = nand_subop_get_data_len(subop, op_id); 1917 1918 nandc_set_read_loc(chip, 0, 0, 0, len, 1); 1919 1920 if (!nandc->props->qpic_version2) { 1921 qcom_write_reg_dma(nandc, &nandc->regs->vld, NAND_DEV_CMD_VLD, 1, 0); 1922 qcom_write_reg_dma(nandc, &nandc->regs->cmd1, NAND_DEV_CMD1, 1, NAND_BAM_NEXT_SGL); 1923 } 1924 1925 nandc->buf_count = len; 1926 memset(nandc->data_buffer, 0xff, nandc->buf_count); 1927 1928 config_nand_single_cw_page_read(chip, false, 0); 1929 1930 qcom_read_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer, 1931 nandc->buf_count, 0); 1932 1933 /* restore CMD1 and VLD regs */ 1934 if (!nandc->props->qpic_version2) { 1935 qcom_write_reg_dma(nandc, &nandc->regs->orig_cmd1, NAND_DEV_CMD1_RESTORE, 1, 0); 1936 qcom_write_reg_dma(nandc, &nandc->regs->orig_vld, NAND_DEV_CMD_VLD_RESTORE, 1, 1937 NAND_BAM_NEXT_SGL); 1938 } 1939 1940 ret = qcom_submit_descs(nandc); 1941 if (ret) { 1942 dev_err(nandc->dev, "failure in submitting param page descriptor\n"); 1943 goto err_out; 1944 } 1945 1946 ret = qcom_wait_rdy_poll(chip, q_op.rdy_timeout_ms); 1947 if (ret) 1948 goto err_out; 1949 1950 memcpy(instr->ctx.data.buf.in, nandc->data_buffer, len); 1951 1952 err_out: 1953 return ret; 1954 } 1955
linux-stable-mirror@lists.linaro.org
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Christian Marangi -
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Robert Marko