Chris Wilson chris@chris-wilson.co.uk writes:

If we use a non-forcewaked write to PMINTRMSK, it does not take effect until much later, if at all, causing a loss of RPS interrupts and no GPU reclocking, leaving the GPU running at the wrong frequency for long periods of time.

Reported-by: Francisco Jerez currojerez@riseup.net Suggested-by: Francisco Jerez currojerez@riseup.net Fixes: 35cc7f32c298 ("drm/i915/gt: Use non-forcewake writes for RPS") Signed-off-by: Chris Wilson chris@chris-wilson.co.uk Cc: Francisco Jerez currojerez@riseup.net Cc: Mika Kuoppala mika.kuoppala@linux.intel.com Cc: Andi Shyti andi.shyti@intel.com Cc: stable@vger.kernel.org # v5.6+

Reviewed-by: Mika Kuoppala mika.kuoppala@linux.intel.com

---

drivers/gpu/drm/i915/gt/intel_rps.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 86110458e2a7..6a3505467406 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -81,13 +81,14 @@ static void rps_enable_interrupts(struct intel_rps *rps) events = (GEN6_PM_RP_UP_THRESHOLD | GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT);

• WRITE_ONCE(rps->pm_events, events);

• spin_lock_irq(&gt->irq_lock); gen6_gt_pm_enable_irq(gt, rps->pm_events); spin_unlock_irq(&gt->irq_lock);

• set(gt->uncore, GEN6_PMINTRMSK, rps_pm_mask(rps, rps->cur_freq));

• intel_uncore_write(gt->uncore,

•                       GEN6_PMINTRMSK, rps_pm_mask(rps, rps->last_freq));
  

} static void gen6_rps_reset_interrupts(struct intel_rps *rps) @@ -120,7 +121,9 @@ static void rps_disable_interrupts(struct intel_rps *rps) struct intel_gt *gt = rps_to_gt(rps); WRITE_ONCE(rps->pm_events, 0);

• set(gt->uncore, GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));

• intel_uncore_write(gt->uncore,

•                       GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));
  

spin_lock_irq(&gt->irq_lock); gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS); -- 2.20.1

Chris Wilson chris@chris-wilson.co.uk writes:

If we use a non-forcewaked write to PMINTRMSK, it does not take effect until much later, if at all, causing a loss of RPS interrupts and no GPU reclocking, leaving the GPU running at the wrong frequency for long periods of time.

Reported-by: Francisco Jerez currojerez@riseup.net Suggested-by: Francisco Jerez currojerez@riseup.net Fixes: 35cc7f32c298 ("drm/i915/gt: Use non-forcewake writes for RPS") Signed-off-by: Chris Wilson chris@chris-wilson.co.uk

Reviewed-by: Francisco Jerez currojerez@riseup.net

Cc: Francisco Jerez currojerez@riseup.net Cc: Mika Kuoppala mika.kuoppala@linux.intel.com Cc: Andi Shyti andi.shyti@intel.com Cc: stable@vger.kernel.org # v5.6+

---

drivers/gpu/drm/i915/gt/intel_rps.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 86110458e2a7..6a3505467406 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -81,13 +81,14 @@ static void rps_enable_interrupts(struct intel_rps *rps) events = (GEN6_PM_RP_UP_THRESHOLD | GEN6_PM_RP_DOWN_THRESHOLD | GEN6_PM_RP_DOWN_TIMEOUT);

• WRITE_ONCE(rps->pm_events, events);

• spin_lock_irq(&gt->irq_lock); gen6_gt_pm_enable_irq(gt, rps->pm_events); spin_unlock_irq(&gt->irq_lock);

• set(gt->uncore, GEN6_PMINTRMSK, rps_pm_mask(rps, rps->cur_freq));

• intel_uncore_write(gt->uncore,

•                       GEN6_PMINTRMSK, rps_pm_mask(rps, rps->last_freq));
  

} static void gen6_rps_reset_interrupts(struct intel_rps *rps) @@ -120,7 +121,9 @@ static void rps_disable_interrupts(struct intel_rps *rps) struct intel_gt *gt = rps_to_gt(rps); WRITE_ONCE(rps->pm_events, 0);

• set(gt->uncore, GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));

• intel_uncore_write(gt->uncore,

•                       GEN6_PMINTRMSK, rps_pm_sanitize_mask(rps, ~0u));
  

spin_lock_irq(&gt->irq_lock); gen6_gt_pm_disable_irq(gt, GEN6_PM_RPS_EVENTS); -- 2.20.1