This patch restores the suspend and resume hooks that the old driver used to have. Apart from stopping and starting the clocks, the resume callback also nullifies the selected_chip pointer, so the next command that is issued will re-select the chip and thereby restore the timing registers.
Without this patch, a PXA3xx based system would cough up an error similar to the one below after resume.
[ 44.660162] marvell-nfc 43100000.nand-controller: Timeout waiting for RB signal [ 44.671492] ubi0 error: ubi_io_write: error -110 while writing 2048 bytes to PEB 102:38912, written 0 bytes [ 44.682887] CPU: 0 PID: 1417 Comm: remote-control Not tainted 4.18.0-rc2+ #344 [ 44.691197] Hardware name: Marvell PXA3xx (Device Tree Support) [ 44.697111] Backtrace: [ 44.699593] [<c0106458>] (dump_backtrace) from [<c0106718>] (show_stack+0x18/0x1c) [ 44.708931] r7:00000800 r6:00009800 r5:00000066 r4:c6139000 [ 44.715833] [<c0106700>] (show_stack) from [<c0678a60>] (dump_stack+0x20/0x28) [ 44.724206] [<c0678a40>] (dump_stack) from [<c0456cbc>] (ubi_io_write+0x3d4/0x630) [ 44.732925] [<c04568e8>] (ubi_io_write) from [<c0454428>] (ubi_eba_write_leb+0x690/0x6fc) ...
Signed-off-by: Daniel Mack daniel@zonque.org Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") Cc: stable@vger.kernel.org --- drivers/mtd/nand/raw/marvell_nand.c | 49 +++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c index 00d9f29bbdb6..4644f6e3b930 100644 --- a/drivers/mtd/nand/raw/marvell_nand.c +++ b/drivers/mtd/nand/raw/marvell_nand.c @@ -2825,6 +2825,54 @@ static int marvell_nfc_remove(struct platform_device *pdev) return 0; }
+static int __maybe_unused marvell_nfc_suspend(struct device *dev) +{ + struct marvell_nfc *nfc = dev_get_drvdata(dev); + struct marvell_nand_chip *chip; + + list_for_each_entry(chip, &nfc->chips, node) + marvell_nfc_wait_ndrun(&chip->chip); + + clk_disable_unprepare(nfc->reg_clk); + clk_disable_unprepare(nfc->core_clk); + + return 0; +} + +static int __maybe_unused marvell_nfc_resume(struct device *dev) +{ + struct marvell_nfc *nfc = dev_get_drvdata(dev); + int ret; + + ret = clk_prepare_enable(nfc->core_clk); + if (ret < 0) + return ret; + + if (!IS_ERR(nfc->reg_clk)) { + ret = clk_prepare_enable(nfc->reg_clk); + if (ret < 0) + return ret; + } + + /* + * Reset nfc->selected_chip so the next command will cause the timing + * registers to be restored in marvell_nfc_select_chip(). + */ + nfc->selected_chip = NULL; + + /* Reset registers that have lots its contents */ + writel_relaxed(NDCR_ALL_INT | NDCR_ND_ARB_EN | NDCR_SPARE_EN | + NDCR_RD_ID_CNT(NFCV1_READID_LEN), nfc->regs + NDCR); + writel_relaxed(0xFFFFFFFF, nfc->regs + NDSR); + writel_relaxed(0, nfc->regs + NDECCCTRL); + + return 0; +} + +static const struct dev_pm_ops marvell_nfc_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(marvell_nfc_suspend, marvell_nfc_resume) +}; + static const struct marvell_nfc_caps marvell_armada_8k_nfc_caps = { .max_cs_nb = 4, .max_rb_nb = 2, @@ -2909,6 +2957,7 @@ static struct platform_driver marvell_nfc_driver = { .driver = { .name = "marvell-nfc", .of_match_table = marvell_nfc_of_ids, + .pm = &marvell_nfc_pm_ops, }, .id_table = marvell_nfc_platform_ids, .probe = marvell_nfc_probe,
Hi Daniel,
Daniel Mack daniel@zonque.org wrote on Sat, 7 Jul 2018 08:46:29 +0200:
This patch restores the suspend and resume hooks that the old driver used to have. Apart from stopping and starting the clocks, the resume callback also nullifies the selected_chip pointer, so the next command that is issued will re-select the chip and thereby restore the timing registers.
Without this patch, a PXA3xx based system would cough up an error similar to the one below after resume.
[ 44.660162] marvell-nfc 43100000.nand-controller: Timeout waiting for RB signal [ 44.671492] ubi0 error: ubi_io_write: error -110 while writing 2048 bytes to PEB 102:38912, written 0 bytes [ 44.682887] CPU: 0 PID: 1417 Comm: remote-control Not tainted 4.18.0-rc2+ #344 [ 44.691197] Hardware name: Marvell PXA3xx (Device Tree Support) [ 44.697111] Backtrace: [ 44.699593] [<c0106458>] (dump_backtrace) from [<c0106718>] (show_stack+0x18/0x1c) [ 44.708931] r7:00000800 r6:00009800 r5:00000066 r4:c6139000 [ 44.715833] [<c0106700>] (show_stack) from [<c0678a60>] (dump_stack+0x20/0x28) [ 44.724206] [<c0678a40>] (dump_stack) from [<c0456cbc>] (ubi_io_write+0x3d4/0x630) [ 44.732925] [<c04568e8>] (ubi_io_write) from [<c0454428>] (ubi_eba_write_leb+0x690/0x6fc) ...
Signed-off-by: Daniel Mack daniel@zonque.org Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") Cc: stable@vger.kernel.org
drivers/mtd/nand/raw/marvell_nand.c | 49 +++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+)
diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c index 00d9f29bbdb6..4644f6e3b930 100644 --- a/drivers/mtd/nand/raw/marvell_nand.c +++ b/drivers/mtd/nand/raw/marvell_nand.c @@ -2825,6 +2825,54 @@ static int marvell_nfc_remove(struct platform_device *pdev) return 0; } +static int __maybe_unused marvell_nfc_suspend(struct device *dev) +{
- struct marvell_nfc *nfc = dev_get_drvdata(dev);
- struct marvell_nand_chip *chip;
- list_for_each_entry(chip, &nfc->chips, node)
marvell_nfc_wait_ndrun(&chip->chip);- clk_disable_unprepare(nfc->reg_clk);
- clk_disable_unprepare(nfc->core_clk);
- return 0;
+}
+static int __maybe_unused marvell_nfc_resume(struct device *dev) +{
- struct marvell_nfc *nfc = dev_get_drvdata(dev);
- int ret;
- ret = clk_prepare_enable(nfc->core_clk);
- if (ret < 0)
return ret;- if (!IS_ERR(nfc->reg_clk)) {
ret = clk_prepare_enable(nfc->reg_clk);if (ret < 0)return ret;- }
- /*
* Reset nfc->selected_chip so the next command will cause the timing* registers to be restored in marvell_nfc_select_chip().*/- nfc->selected_chip = NULL;
- /* Reset registers that have lots its contents */
s/lots its contents/lost their content/
- writel_relaxed(NDCR_ALL_INT | NDCR_ND_ARB_EN | NDCR_SPARE_EN |
NDCR_RD_ID_CNT(NFCV1_READID_LEN), nfc->regs + NDCR);- writel_relaxed(0xFFFFFFFF, nfc->regs + NDSR);
- writel_relaxed(0, nfc->regs + NDECCCTRL);
This is an exact copy of a few lines from marvell_nfc_init(). What about creating an helper called marvell_nfc_init_core_registers(nfc) that would be called twice?
Thanks, Miquèl
On Saturday, July 07, 2018 05:48 PM, Miquel Raynal wrote:
Daniel Mack daniel@zonque.org wrote on Sat, 7 Jul 2018 08:46:29 +0200:
- writel_relaxed(NDCR_ALL_INT | NDCR_ND_ARB_EN | NDCR_SPARE_EN |
NDCR_RD_ID_CNT(NFCV1_READID_LEN), nfc->regs + NDCR);- writel_relaxed(0xFFFFFFFF, nfc->regs + NDSR);
- writel_relaxed(0, nfc->regs + NDECCCTRL);
This is an exact copy of a few lines from marvell_nfc_init(). What about creating an helper called marvell_nfc_init_core_registers(nfc) that would be called twice?
Sure, why not. Will send a v4 for that.
Thanks, Daniel
Hi Daniel,
Thanks for all the changes.
Daniel Mack daniel@zonque.org wrote on Sat, 7 Jul 2018 08:46:29 +0200:
This patch restores the suspend and resume hooks that the old driver used to have. Apart from stopping and starting the clocks, the resume callback also nullifies the selected_chip pointer, so the next command that is issued will re-select the chip and thereby restore the timing registers.
Without this patch, a PXA3xx based system would cough up an error similar to the one below after resume.
[ 44.660162] marvell-nfc 43100000.nand-controller: Timeout waiting for RB signal [ 44.671492] ubi0 error: ubi_io_write: error -110 while writing 2048 bytes to PEB 102:38912, written 0 bytes [ 44.682887] CPU: 0 PID: 1417 Comm: remote-control Not tainted 4.18.0-rc2+ #344 [ 44.691197] Hardware name: Marvell PXA3xx (Device Tree Support) [ 44.697111] Backtrace: [ 44.699593] [<c0106458>] (dump_backtrace) from [<c0106718>] (show_stack+0x18/0x1c) [ 44.708931] r7:00000800 r6:00009800 r5:00000066 r4:c6139000 [ 44.715833] [<c0106700>] (show_stack) from [<c0678a60>] (dump_stack+0x20/0x28) [ 44.724206] [<c0678a40>] (dump_stack) from [<c0456cbc>] (ubi_io_write+0x3d4/0x630) [ 44.732925] [<c04568e8>] (ubi_io_write) from [<c0454428>] (ubi_eba_write_leb+0x690/0x6fc) ...
Signed-off-by: Daniel Mack daniel@zonque.org Fixes: 02f26ecf8c77 ("mtd: nand: add reworked Marvell NAND controller driver") Cc: stable@vger.kernel.org
Do you mind if I apply all the patches to nand/next? This fix will only appear in mainline after the merge window (in a few weeks). Otherwise I'll have to apply patches 2 and 3 for the next-next-release (supposedly 4.20).
Thanks, Miquèl
On Sunday, July 08, 2018 02:04 PM, Miquel Raynal wrote:
Do you mind if I apply all the patches to nand/next? This fix will only appear in mainline after the merge window (in a few weeks). Otherwise I'll have to apply patches 2 and 3 for the next-next-release (supposedly 4.20).
I don't quite understand the options, but the thing that's important for me is that 1/3 lands for 4.19. I don't care for the other two really, as they have no functional impact.
Thanks, Daniel
Hi Daniel,
Daniel Mack daniel@zonque.org wrote on Sun, 8 Jul 2018 22:13:36 +0200:
On Sunday, July 08, 2018 02:04 PM, Miquel Raynal wrote:
Do you mind if I apply all the patches to nand/next? This fix will only appear in mainline after the merge window (in a few weeks). Otherwise I'll have to apply patches 2 and 3 for the next-next-release (supposedly 4.20).
I don't quite understand the options, but the thing that's important for me is that 1/3 lands for 4.19. I don't care for the other two really, as they have no functional impact.
Usually, accepted fixes are part of a specific pull request that can be sent at any time during the -rc's cycles, this is the fixes branch. Otherwise, for regular patches (or "features"), only one pull request is sent at the time of the merge window, this is the "next" branch.
Fixes are based on the last -rc while features are usually based only on -rc1. Problem is, when a fix and another change are done on the same code section, this would produce a merge conflict in Linus's tree. To avoid it, two solutions: - take all the patches (including non-urgent fixes) in the -next branch - rebase/merge the -rc that contains the fix before applying the other patches.
In this case, series applied to nand/next (will be out for 4.19).
Thanks, Miquèl
linux-stable-mirror@lists.linaro.org
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Daniel Mack -
Miquel Raynal