This set of patches adds the clocks necessary for USB on the Exynos7885 SoC.
While at it, also fix some issues with the existing driver/bindings.
This set was split from a previous set containing clk, phy, and usb patches [1].
Changes in v2: - Split from full patchset. - Added Cc-stable tags and fixes tag to update CLKS_NR_FSYS patch - Blank line fixes
Cc: stable@vger.kernel.org
[1] https://lore.kernel.org/linux-samsung-soc/20240804215458.404085-1-virag.davi...
David Virag (7): dt-bindings: clock: exynos7885: Fix duplicated binding dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices dt-bindings: clock: exynos7885: Add indices for USB clocks clk: samsung: exynos7885: Update CLKS_NR_FSYS after bindings fix clk: samsung: exynos7885: Add missing MUX clocks from PLLs in CMU_TOP clk: samsung: clk-pll: Add support for pll_1418x clk: samsung: exynos7885: Add USB related clocks to CMU_FSYS
drivers/clk/samsung/clk-exynos7885.c | 93 ++++++++++++++++++++------ drivers/clk/samsung/clk-pll.c | 20 ++++-- drivers/clk/samsung/clk-pll.h | 1 + include/dt-bindings/clock/exynos7885.h | 32 ++++++--- 4 files changed, 111 insertions(+), 35 deletions(-)
The numbering in Exynos7885's FSYS CMU bindings has 4 duplicated by accident, with the rest of the bindings continuing with 5.
Fix this by moving CLK_MOUT_FSYS_USB30DRD_USER to the end as 11.
Since CLK_MOUT_FSYS_USB30DRD_USER is not used in any device tree as of now, and there are no other clocks affected (maybe apart from CLK_MOUT_FSYS_MMC_SDIO_USER which the number was shared with, also not used in a device tree), this is the least impactful way to solve this problem.
Fixes: cd268e309c29 ("dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS") Cc: stable@vger.kernel.org Signed-off-by: David Virag virag.david003@gmail.com --- include/dt-bindings/clock/exynos7885.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/dt-bindings/clock/exynos7885.h b/include/dt-bindings/clock/exynos7885.h index 255e3aa94323..54cfccff8508 100644 --- a/include/dt-bindings/clock/exynos7885.h +++ b/include/dt-bindings/clock/exynos7885.h @@ -136,12 +136,12 @@ #define CLK_MOUT_FSYS_MMC_CARD_USER 2 #define CLK_MOUT_FSYS_MMC_EMBD_USER 3 #define CLK_MOUT_FSYS_MMC_SDIO_USER 4 -#define CLK_MOUT_FSYS_USB30DRD_USER 4 #define CLK_GOUT_MMC_CARD_ACLK 5 #define CLK_GOUT_MMC_CARD_SDCLKIN 6 #define CLK_GOUT_MMC_EMBD_ACLK 7 #define CLK_GOUT_MMC_EMBD_SDCLKIN 8 #define CLK_GOUT_MMC_SDIO_ACLK 9 #define CLK_GOUT_MMC_SDIO_SDCLKIN 10 +#define CLK_MOUT_FSYS_USB30DRD_USER 11
#endif /* _DT_BINDINGS_CLOCK_EXYNOS_7885_H */
On Tue, 06 Aug 2024 14:11:44 +0200, David Virag wrote:
The numbering in Exynos7885's FSYS CMU bindings has 4 duplicated by accident, with the rest of the bindings continuing with 5.
Fix this by moving CLK_MOUT_FSYS_USB30DRD_USER to the end as 11.
Since CLK_MOUT_FSYS_USB30DRD_USER is not used in any device tree as of now, and there are no other clocks affected (maybe apart from CLK_MOUT_FSYS_MMC_SDIO_USER which the number was shared with, also not used in a device tree), this is the least impactful way to solve this problem.
[...]
Applied, thanks!
[1/7] dt-bindings: clock: exynos7885: Fix duplicated binding https://git.kernel.org/krzk/linux/c/abf3a3ea9acb5c886c8729191a670744ecd42024
Best regards,
Update CLKS_NR_FSYS to the proper value after a fix in DT bindings. This should always be the last clock in a CMU + 1.
Fixes: cd268e309c29 ("dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS") Cc: stable@vger.kernel.org Signed-off-by: David Virag virag.david003@gmail.com --- drivers/clk/samsung/clk-exynos7885.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos7885.c b/drivers/clk/samsung/clk-exynos7885.c index f7d7427a558b..87387d4cbf48 100644 --- a/drivers/clk/samsung/clk-exynos7885.c +++ b/drivers/clk/samsung/clk-exynos7885.c @@ -20,7 +20,7 @@ #define CLKS_NR_TOP (CLK_GOUT_FSYS_USB30DRD + 1) #define CLKS_NR_CORE (CLK_GOUT_TREX_P_CORE_PCLK_P_CORE + 1) #define CLKS_NR_PERI (CLK_GOUT_WDT1_PCLK + 1) -#define CLKS_NR_FSYS (CLK_GOUT_MMC_SDIO_SDCLKIN + 1) +#define CLKS_NR_FSYS (CLK_MOUT_FSYS_USB30DRD_USER + 1)
/* ---- CMU_TOP ------------------------------------------------------------- */
On Tue, 06 Aug 2024 14:11:47 +0200, David Virag wrote:
Update CLKS_NR_FSYS to the proper value after a fix in DT bindings. This should always be the last clock in a CMU + 1.
Applied, thanks!
[4/7] clk: samsung: exynos7885: Update CLKS_NR_FSYS after bindings fix https://git.kernel.org/krzk/linux/c/217a5f23c290c349ceaa37a6f2c014ad4c2d5759
Best regards,
linux-stable-mirror@lists.linaro.org
-
David Virag -
Krzysztof Kozlowski