Commit 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address.") disables ATS for device that can do unaligned page request.
This looks wrong, since the commit log said it's because the page request descriptor doesn't support reporting unaligned request.
A victim is Qemu's virtio-pci which doesn't advertise the page aligned address. Fixing by disable PRI instead of ATS if device doesn't have page aligned request.
Cc: stable@vger.kernel.org Cc: Ashok Raj ashok.raj@intel.com Cc: Jacob Pan jacob.jun.pan@linux.intel.com Cc: Keith Busch keith.busch@intel.com Cc: Kuppuswamy Sathyanarayanan sathyanarayanan.kuppuswamy@linux.intel.com Signed-off-by: Jason Wang jasowang@redhat.com --- drivers/iommu/intel/iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index e9864e52b0e9..ef5214a8a4dd 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1440,10 +1440,11 @@ static void iommu_enable_dev_iotlb(struct device_domain_info *info)
if (info->pri_supported && (info->pasid_enabled ? pci_prg_resp_pasid_required(pdev) : 1) && + pci_ats_page_aligned(pdev) && !pci_reset_pri(pdev) && !pci_enable_pri(pdev, 32)) info->pri_enabled = 1; #endif - if (info->ats_supported && pci_ats_page_aligned(pdev) && + if (info->ats_supported && !pci_enable_ats(pdev, VTD_PAGE_SHIFT)) { info->ats_enabled = 1; domain_update_iotlb(info->domain);
Hi Jason
On Wed, Sep 09, 2020 at 04:34:32PM +0800, Jason Wang wrote:
Commit 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address.") disables ATS for device that can do unaligned page request.
Did you take a look at the PCI specification? Page Aligned Request is in the ATS capability Register.
ATS Capability Register (Offset 0x04h)
bit (5): Page Aligned Request - If Set, indicates the Untranslated address is always aligned to 4096 byte boundary. Setting this field is recommended. This field permits software to distinguish between implemntations compatible with this specification and those compatible with an earlier version of this specification in which a Requester was permitted to supply anything in bits [11:2].
This looks wrong, since the commit log said it's because the page request descriptor doesn't support reporting unaligned request.
I don't think you can change the definition from ATS to PRI. Both are orthogonal feature.
A victim is Qemu's virtio-pci which doesn't advertise the page aligned address. Fixing by disable PRI instead of ATS if device doesn't have page aligned request.
This is a requirement for the Intel IOMMU's.
You say virtio, so is it all emulated device or you talking about some hardware that implemented virtio-pci compliant hw? If you are sure the device actually does comply with the requirement, but just not enumerating the capability, you can maybe work a quirk to overcome that?
Now PRI also has an alignment requirement, and Intel IOMMU's requires that as well. If your device supports SRIOV as well, PASID and PRI are enumerated just on the PF and not the VF. You might want to pay attension to that. We are still working on a solution for that problem.
I don't think this is the right fix for your problem.
Cc: stable@vger.kernel.org Cc: Ashok Raj ashok.raj@intel.com Cc: Jacob Pan jacob.jun.pan@linux.intel.com Cc: Keith Busch keith.busch@intel.com Cc: Kuppuswamy Sathyanarayanan sathyanarayanan.kuppuswamy@linux.intel.com Signed-off-by: Jason Wang jasowang@redhat.com
drivers/iommu/intel/iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
----- Original Message -----
Hi Jason
On Wed, Sep 09, 2020 at 04:34:32PM +0800, Jason Wang wrote:
Commit 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address.") disables ATS for device that can do unaligned page request.
Did you take a look at the PCI specification? Page Aligned Request is in the ATS capability Register.
ATS Capability Register (Offset 0x04h)
bit (5): Page Aligned Request - If Set, indicates the Untranslated address is always aligned to 4096 byte boundary. Setting this field is recommended. This field permits software to distinguish between implemntations compatible with this specification and those compatible with an earlier version of this specification in which a Requester was permitted to supply anything in bits [11:2].
Yes, my understanding is that this is optional not mandatory.
This looks wrong, since the commit log said it's because the page request descriptor doesn't support reporting unaligned request.
I don't think you can change the definition from ATS to PRI. Both are orthogonal feature.
I may miss something, here's my understanding is that:
- page request descriptor will only be used when PRS is enabled - ATS spec allows unaligned request
So any reason for disabling ATS for unaligned request even if PRS is not enabled?
A victim is Qemu's virtio-pci which doesn't advertise the page aligned address. Fixing by disable PRI instead of ATS if device doesn't have page aligned request.
This is a requirement for the Intel IOMMU's.
You say virtio, so is it all emulated device or you talking about some hardware that implemented virtio-pci compliant hw? If you are sure the device actually does comply with the requirement, but just not enumerating the capability, you can maybe work a quirk to overcome that?
So far only emulated devices. But we are helping some vendor to implement virtio hardware so we need to understand the connection between ATS alignment and page request descriptor.
Now PRI also has an alignment requirement, and Intel IOMMU's requires that as well. If your device supports SRIOV as well, PASID and PRI are enumerated just on the PF and not the VF. You might want to pay attension to that. We are still working on a solution for that problem.
Thanks for the reminding, but it looks to me according to the ATS spec, all PRI message is 4096 byte aligned? E.g lower bites were used for group index etc.
Thanks
I don't think this is the right fix for your problem.
Cc: stable@vger.kernel.org Cc: Ashok Raj ashok.raj@intel.com Cc: Jacob Pan jacob.jun.pan@linux.intel.com Cc: Keith Busch keith.busch@intel.com Cc: Kuppuswamy Sathyanarayanan sathyanarayanan.kuppuswamy@linux.intel.com Signed-off-by: Jason Wang jasowang@redhat.com
drivers/iommu/intel/iommu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
Hi
[This is an automated email]
This commit has been processed because it contains a -stable tag. The stable tag indicates that it's relevant for the following trees: all
The bot has tested the following trees: v5.8.7, v5.4.63, v4.19.143, v4.14.196, v4.9.235, v4.4.235.
v5.8.7: Build OK! v5.4.63: Failed to apply! Possible dependencies: da656a042568 ("iommu/vt-d: Use pci_ats_supported()")
v4.19.143: Failed to apply! Possible dependencies: 1b84778a62ad ("iommu/vt-d: Fix PRI/PASID dependency issue.") 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address.") d8b859105457 ("iommu/vt-d: Disable ATS support on untrusted devices") da656a042568 ("iommu/vt-d: Use pci_ats_supported()") fb58fdcd295b ("iommu/vt-d: Do not enable ATS for untrusted devices")
v4.14.196: Failed to apply! Possible dependencies: 1b84778a62ad ("iommu/vt-d: Fix PRI/PASID dependency issue.") 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address.") cef74409ea79 ("PCI: Add "pci=noats" boot parameter") d8b859105457 ("iommu/vt-d: Disable ATS support on untrusted devices") da656a042568 ("iommu/vt-d: Use pci_ats_supported()") fb58fdcd295b ("iommu/vt-d: Do not enable ATS for untrusted devices")
v4.9.235: Failed to apply! Possible dependencies: 1b84778a62ad ("iommu/vt-d: Fix PRI/PASID dependency issue.") 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address.") cef74409ea79 ("PCI: Add "pci=noats" boot parameter") d8b859105457 ("iommu/vt-d: Disable ATS support on untrusted devices") da656a042568 ("iommu/vt-d: Use pci_ats_supported()") fb58fdcd295b ("iommu/vt-d: Do not enable ATS for untrusted devices")
v4.4.235: Failed to apply! Possible dependencies: 0824c5920b16 ("iommu/vt-d: avoid dev iotlb logic for domains with no dev iotlbs") 0cbd4b34cda9 ("xhci: mediatek: support MTK xHCI host controller") 1b84778a62ad ("iommu/vt-d: Fix PRI/PASID dependency issue.") 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address.") 7e70cbffe236 ("usb: xhci: add a quirk bit for ssic port unused") 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend") cef74409ea79 ("PCI: Add "pci=noats" boot parameter") d8b859105457 ("iommu/vt-d: Disable ATS support on untrusted devices") da656a042568 ("iommu/vt-d: Use pci_ats_supported()") fb58fdcd295b ("iommu/vt-d: Do not enable ATS for untrusted devices")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
linux-stable-mirror@lists.linaro.org
-
Jason Wang -
Raj, Ashok -
Sasha Levin