From: Thomas Gleixner tglx@linutronix.de
The preparation for PTI which added CR3 switching to the entry code misplaced the CR3 switch in entry_SYSCALL_compat().
With PTI enabled the entry code tries to access a per cpu variable after switching to kernel GS. This fails because that variable is not mapped to user space. This results in a double fault and in the worst case a kernel crash.
Move the switch ahead of the access and clobber RSP which has been saved already.
Fixes: 8a09317b895f ("x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switching") Reported-by: Lars Wendler wendler.lars@web.de Reported-by: Laura Abbott labbott@redhat.com Signed-off-by: Thomas Gleixner tglx@linutronix.de Cc: Borislav Betkov bp@alien8.de Cc: Andy Lutomirski luto@kernel.org, Cc: Dave Hansen dave.hansen@linux.intel.com, Cc: Peter Zijlstra peterz@infradead.org, Cc: Greg KH gregkh@linuxfoundation.org, , Cc: Boris Ostrovsky boris.ostrovsky@oracle.com, Cc: Juergen Gross jgross@suse.com Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/alpine.DEB.2.20.1801031949200.1957@nanos --- arch/x86/entry/entry_64_compat.S | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S index 40f17009ec20..98d5358e4041 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arch/x86/entry/entry_64_compat.S @@ -190,8 +190,13 @@ ENTRY(entry_SYSCALL_compat) /* Interrupts are off on entry. */ swapgs
- /* Stash user ESP and switch to the kernel stack. */ + /* Stash user ESP */ movl %esp, %r8d + + /* Use %rsp as scratch reg. User ESP is stashed in r8 */ + SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp + + /* Switch to the kernel stack */ movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
/* Construct struct pt_regs on stack */ @@ -219,12 +224,6 @@ GLOBAL(entry_SYSCALL_compat_after_hwframe) pushq $0 /* pt_regs->r14 = 0 */ pushq $0 /* pt_regs->r15 = 0 */
- /* - * We just saved %rdi so it is safe to clobber. It is not - * preserved during the C calls inside TRACE_IRQS_OFF anyway. - */ - SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi - /* * User mode is traced as though IRQs are on, and SYSENTER * turned them off.
Sorry. Ignore this please.
2018-01-05 0:45 GMT+03:00 Maxim Moseychuk franchesko.salias.hudro.pedros@gmail.com:
From: Thomas Gleixner tglx@linutronix.de
The preparation for PTI which added CR3 switching to the entry code misplaced the CR3 switch in entry_SYSCALL_compat().
With PTI enabled the entry code tries to access a per cpu variable after switching to kernel GS. This fails because that variable is not mapped to user space. This results in a double fault and in the worst case a kernel crash.
Move the switch ahead of the access and clobber RSP which has been saved already.
Fixes: 8a09317b895f ("x86/mm/pti: Prepare the x86/entry assembly code for entry/exit CR3 switching") Reported-by: Lars Wendler wendler.lars@web.de Reported-by: Laura Abbott labbott@redhat.com Signed-off-by: Thomas Gleixner tglx@linutronix.de Cc: Borislav Betkov bp@alien8.de Cc: Andy Lutomirski luto@kernel.org, Cc: Dave Hansen dave.hansen@linux.intel.com, Cc: Peter Zijlstra peterz@infradead.org, Cc: Greg KH gregkh@linuxfoundation.org, , Cc: Boris Ostrovsky boris.ostrovsky@oracle.com, Cc: Juergen Gross jgross@suse.com Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/alpine.DEB.2.20.1801031949200.1957@nanos
arch/x86/entry/entry_64_compat.S | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_compat.S index 40f17009ec20..98d5358e4041 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arch/x86/entry/entry_64_compat.S @@ -190,8 +190,13 @@ ENTRY(entry_SYSCALL_compat) /* Interrupts are off on entry. */ swapgs
/* Stash user ESP and switch to the kernel stack. */
/* Stash user ESP */ movl %esp, %r8d
/* Use %rsp as scratch reg. User ESP is stashed in r8 */
SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
/* Switch to the kernel stack */ movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp /* Construct struct pt_regs on stack */
@@ -219,12 +224,6 @@ GLOBAL(entry_SYSCALL_compat_after_hwframe) pushq $0 /* pt_regs->r14 = 0 */ pushq $0 /* pt_regs->r15 = 0 */
/*
* We just saved %rdi so it is safe to clobber. It is not
* preserved during the C calls inside TRACE_IRQS_OFF anyway.
*/
SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
/* * User mode is traced as though IRQs are on, and SYSENTER * turned them off.
-- 2.15.1
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