When there is contention on faulting in a particular page table entry at stage 2, the break-before-make requirement of the architecture can lead to additional refaulting due to TLB invalidation.

Avoid this by skipping a page table update if the new value of the PTE matches the previous value.

Fixes: d5d8184d35c9 ("KVM: ARM: Memory virtualization setup") Signed-off-by: Punit Agrawal punit.agrawal@arm.com Reviewed-by: Suzuki Poulose suzuki.poulose@arm.com Cc: Marc Zyngier marc.zyngier@arm.com Cc: Christoffer Dall christoffer.dall@arm.com Cc: stable@vger.kernel.org --- virt/kvm/arm/mmu.c | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c index 2bb0b5dba412..c2b95a22959b 100644 --- a/virt/kvm/arm/mmu.c +++ b/virt/kvm/arm/mmu.c @@ -1118,6 +1118,10 @@ static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache, /* Create 2nd stage page table mapping - Level 3 */ old_pte = *pte; if (pte_present(old_pte)) { + /* Skip page table update if there is no change */ + if (pte_val(old_pte) == pte_val(*new_pte)) + return 0; + kvm_set_pte(pte, __pte(0)); kvm_tlb_flush_vmid_ipa(kvm, addr); } else {