On Mon, Jan 31, 2022 at 05:32:24PM +0100, quentin.schulz@theobroma-systems.com wrote:

From: Quentin Schulz quentin.schulz@theobroma-systems.com

Thanks for your report.

In commit 4e7cf74fa3b2 ("clk: fractional-divider: Export approximation algorithm to the CCF users"), the code handling the rational best approximation algorithm was replaced by a call to the core clk_fractional_divider_general_approximation function which did the same thing back then.

However, in commit 82f53f9ee577 ("clk: fractional-divider: Introduce POWER_OF_TWO_PS flag"), this common code was made conditional on CLK_FRAC_DIVIDER_POWER_OF_TWO_PS flag which was not added back to the rockchip clock driver.

This broke the ltk050h3146w-a2 MIPI DSI display present on a PX30-based downstream board.

Let's add the flag to the fractional divider flags so that the original and intended behavior is brought back to the rockchip clock drivers.

I believe this was the result of the discussion about 1000 in DRM code.

I Cc'ed this to the people from 64ec4912c51a ("drm/rockchip: Update crtc fixup to account for fractional clk change").

Fixes: 82f53f9ee577 ("clk: fractional-divider: Introduce POWER_OF_TWO_PS flag") Cc: stable@vger.kernel.org Cc: Quentin Schulz foss+kernel@0leil.net Signed-off-by: Quentin Schulz quentin.schulz@theobroma-systems.com

---

drivers/clk/rockchip/clk.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index b7be7e11b0df..bb8a844309bf 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -180,6 +180,7 @@ static void rockchip_fractional_approximation(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate, unsigned long *m, unsigned long *n) {

• struct clk_fractional_divider *fd = to_clk_fd(hw); unsigned long p_rate, p_parent_rate; struct clk_hw *p_parent;

@@ -190,6 +191,8 @@ static void rockchip_fractional_approximation(struct clk_hw *hw, *parent_rate = p_parent_rate; }

• fd->flags |= CLK_FRAC_DIVIDER_POWER_OF_TWO_PS;
• clk_fractional_divider_general_approximation(hw, rate, parent_rate, m, n);

}