From: Frieder Schrempf frieder.schrempf@kontron.de
The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the limit accordingly to prevent any performance issues caused by the really low clock speed of 100 kHz.
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards") Cc: stable@vger.kernel.org Signed-off-by: Frieder Schrempf frieder.schrempf@kontron.de --- arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts index f2c8ccefd1bf..dbf11e03ecce 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts @@ -98,7 +98,7 @@ can0: can@0 { clocks = <&osc_can>; interrupt-parent = <&gpio4>; interrupts = <28 IRQ_TYPE_EDGE_FALLING>; - spi-max-frequency = <100000>; + spi-max-frequency = <10000000>; vdd-supply = <®_vdd_3v3>; xceiver-supply = <®_vdd_5v>; };
On Thu, Sep 30, 2021 at 05:56:28PM +0200, Frieder Schrempf wrote:
From: Frieder Schrempf frieder.schrempf@kontron.de
The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the limit accordingly to prevent any performance issues caused by the really low clock speed of 100 kHz.
Could you share some testing result of this change?
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
It's really an optimization rather than fix, isn't it?
Shawn
Cc: stable@vger.kernel.org Signed-off-by: Frieder Schrempf frieder.schrempf@kontron.de
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts index f2c8ccefd1bf..dbf11e03ecce 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts @@ -98,7 +98,7 @@ can0: can@0 { clocks = <&osc_can>; interrupt-parent = <&gpio4>; interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <100000>;
spi-max-frequency = <10000000>;-- 2.33.0
On 05.10.21 09:12, Shawn Guo wrote:
On Thu, Sep 30, 2021 at 05:56:28PM +0200, Frieder Schrempf wrote:
From: Frieder Schrempf frieder.schrempf@kontron.de
The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the limit accordingly to prevent any performance issues caused by the really low clock speed of 100 kHz.
Could you share some testing result of this change?
Without this change, receiving CAN messages on the board beyond a certain bitrate will cause overrun errors (see 'ip -det -stat link show can0').
With this fix, receiving messages on the bus works without any overrun errors for bitrates up to 1 MBit.
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
It's really an optimization rather than fix, isn't it?
It removes the arbitrarily low limit on the SPI frequency, that was caused by a typo in the original dts. As the usage of the CAN bus is seriously affected by this I would consider it a fix. But if you think otherwise, feel free to remove the Fixes tag.
Shawn
Cc: stable@vger.kernel.org Signed-off-by: Frieder Schrempf frieder.schrempf@kontron.de
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts index f2c8ccefd1bf..dbf11e03ecce 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts @@ -98,7 +98,7 @@ can0: can@0 { clocks = <&osc_can>; interrupt-parent = <&gpio4>; interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <100000>;
spi-max-frequency = <10000000>;-- 2.33.0
On Tue, Oct 05, 2021 at 07:17:13PM +0200, Frieder Schrempf wrote:
On 05.10.21 09:12, Shawn Guo wrote:
On Thu, Sep 30, 2021 at 05:56:28PM +0200, Frieder Schrempf wrote:
From: Frieder Schrempf frieder.schrempf@kontron.de
The MCP2515 can be used with an SPI clock of up to 10 MHz. Set the limit accordingly to prevent any performance issues caused by the really low clock speed of 100 kHz.
Could you share some testing result of this change?
Without this change, receiving CAN messages on the board beyond a certain bitrate will cause overrun errors (see 'ip -det -stat link show can0').
With this fix, receiving messages on the bus works without any overrun errors for bitrates up to 1 MBit.
Fixes: 21c4f45b335f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
It's really an optimization rather than fix, isn't it?
It removes the arbitrarily low limit on the SPI frequency, that was caused by a typo in the original dts. As the usage of the CAN bus is seriously affected by this I would consider it a fix. But if you think otherwise, feel free to remove the Fixes tag.
Put all these good information into commit log, and I will be happy to take it as a fix.
Shawn
Cc: stable@vger.kernel.org Signed-off-by: Frieder Schrempf frieder.schrempf@kontron.de
arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts index f2c8ccefd1bf..dbf11e03ecce 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-kontron-n801x-s.dts @@ -98,7 +98,7 @@ can0: can@0 { clocks = <&osc_can>; interrupt-parent = <&gpio4>; interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <100000>;
spi-max-frequency = <10000000>;-- 2.33.0
linux-stable-mirror@lists.linaro.org
-
Frieder Schrempf -
Frieder Schrempf -
Shawn Guo