From: Konrad Dybcio konrad.dybcio@oss.qualcomm.com
[ Upstream commit e7282bf8a0e9bb8a4cb1be406674ff7bb7b264f2 ]
X1P42100 is a cousin of X1E80100, and hence can make use of the latter's configuration. Do so.
Signed-off-by: Konrad Dybcio konrad.dybcio@oss.qualcomm.com Reviewed-by: Dmitry Baryshkov dmitry.baryshkov@linaro.org Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-3-55347831d73c@oss.qual... Signed-off-by: Bjorn Andersson andersson@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/soc/qcom/qcom_pd_mapper.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/soc/qcom/qcom_pd_mapper.c b/drivers/soc/qcom/qcom_pd_mapper.c index 6e30f08761aa4..50aa54996901f 100644 --- a/drivers/soc/qcom/qcom_pd_mapper.c +++ b/drivers/soc/qcom/qcom_pd_mapper.c @@ -561,6 +561,7 @@ static const struct of_device_id qcom_pdm_domains[] __maybe_unused = { { .compatible = "qcom,sm8550", .data = sm8550_domains, }, { .compatible = "qcom,sm8650", .data = sm8550_domains, }, { .compatible = "qcom,x1e80100", .data = x1e80100_domains, }, + { .compatible = "qcom,x1p42100", .data = x1e80100_domains, }, {}, };
From: Michael Margolin mrgolin@amazon.com
[ Upstream commit 123c13f10ed3627ba112172d8bd122a72cae226d ]
Make sure the device is being reset on driver exit whatever the reason is, to keep the device aligned and allow it to close shared resources (e.g. admin queue).
Reviewed-by: Firas Jahjah firasj@amazon.com Reviewed-by: Yonatan Nachum ynachum@amazon.com Signed-off-by: Michael Margolin mrgolin@amazon.com Link: https://patch.msgid.link/20241225131548.15155-1-mrgolin@amazon.com Reviewed-by: Gal Pressman gal.pressman@linux.dev Signed-off-by: Leon Romanovsky leon@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/infiniband/hw/efa/efa_main.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/infiniband/hw/efa/efa_main.c b/drivers/infiniband/hw/efa/efa_main.c index ad225823e6f2f..45a4564c670c0 100644 --- a/drivers/infiniband/hw/efa/efa_main.c +++ b/drivers/infiniband/hw/efa/efa_main.c @@ -470,7 +470,6 @@ static void efa_ib_device_remove(struct efa_dev *dev) ibdev_info(&dev->ibdev, "Unregister ib device\n"); ib_unregister_device(&dev->ibdev); efa_destroy_eqs(dev); - efa_com_dev_reset(&dev->edev, EFA_REGS_RESET_NORMAL); efa_release_doorbell_bar(dev); }
@@ -643,12 +642,14 @@ static struct efa_dev *efa_probe_device(struct pci_dev *pdev) return ERR_PTR(err); }
-static void efa_remove_device(struct pci_dev *pdev) +static void efa_remove_device(struct pci_dev *pdev, + enum efa_regs_reset_reason_types reset_reason) { struct efa_dev *dev = pci_get_drvdata(pdev); struct efa_com_dev *edev;
edev = &dev->edev; + efa_com_dev_reset(edev, reset_reason); efa_com_admin_destroy(edev); efa_free_irq(dev, &dev->admin_irq); efa_disable_msix(dev); @@ -676,7 +677,7 @@ static int efa_probe(struct pci_dev *pdev, const struct pci_device_id *ent) return 0;
err_remove_device: - efa_remove_device(pdev); + efa_remove_device(pdev, EFA_REGS_RESET_INIT_ERR); return err; }
@@ -685,7 +686,7 @@ static void efa_remove(struct pci_dev *pdev) struct efa_dev *dev = pci_get_drvdata(pdev);
efa_ib_device_remove(dev); - efa_remove_device(pdev); + efa_remove_device(pdev, EFA_REGS_RESET_NORMAL); }
static void efa_shutdown(struct pci_dev *pdev)
From: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org
[ Upstream commit 94f48ecf0a538019ca2025e0b0da391f8e7cc58c ]
Commit ca61d6836e6f ("firmware: qcom: scm: fix a NULL-pointer dereference") makes it explicit that qcom_scm_get_tzmem_pool() can return NULL, therefore its users should handle this.
Signed-off-by: Krzysztof Kozlowski krzysztof.kozlowski@linaro.org Reviewed-by: Bartosz Golaszewski bartosz.golaszewski@linaro.org Link: https://lore.kernel.org/r/20241209-qcom-scm-missing-barriers-and-all-sort-of... Signed-off-by: Bjorn Andersson andersson@kernel.org Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/firmware/qcom/qcom_scm-smc.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/firmware/qcom/qcom_scm-smc.c b/drivers/firmware/qcom/qcom_scm-smc.c index 2b4c2826f5725..3f10b23ec941b 100644 --- a/drivers/firmware/qcom/qcom_scm-smc.c +++ b/drivers/firmware/qcom/qcom_scm-smc.c @@ -173,6 +173,9 @@ int __scm_smc_call(struct device *dev, const struct qcom_scm_desc *desc, smc.args[i + SCM_SMC_FIRST_REG_IDX] = desc->args[i];
if (unlikely(arglen > SCM_SMC_N_REG_ARGS)) { + if (!mempool) + return -EINVAL; + args_virt = qcom_tzmem_alloc(mempool, SCM_SMC_N_EXT_ARGS * sizeof(u64), flag);
From: Aaro Koskinen aaro.koskinen@iki.fi
[ Upstream commit e4b6b665df815b4841e71b72f06446884e8aad40 ]
When using touchscreen and framebuffer, Nokia 770 crashes easily with:
BUG: scheduling while atomic: irq/144-ads7846/82/0x00010000 Modules linked in: usb_f_ecm g_ether usb_f_rndis u_ether libcomposite configfs omap_udc ohci_omap ohci_hcd CPU: 0 UID: 0 PID: 82 Comm: irq/144-ads7846 Not tainted 6.12.7-770 #2 Hardware name: Nokia 770 Call trace: unwind_backtrace from show_stack+0x10/0x14 show_stack from dump_stack_lvl+0x54/0x5c dump_stack_lvl from __schedule_bug+0x50/0x70 __schedule_bug from __schedule+0x4d4/0x5bc __schedule from schedule+0x34/0xa0 schedule from schedule_preempt_disabled+0xc/0x10 schedule_preempt_disabled from __mutex_lock.constprop.0+0x218/0x3b4 __mutex_lock.constprop.0 from clk_prepare_lock+0x38/0xe4 clk_prepare_lock from clk_set_rate+0x18/0x154 clk_set_rate from sossi_read_data+0x4c/0x168 sossi_read_data from hwa742_read_reg+0x5c/0x8c hwa742_read_reg from send_frame_handler+0xfc/0x300 send_frame_handler from process_pending_requests+0x74/0xd0 process_pending_requests from lcd_dma_irq_handler+0x50/0x74 lcd_dma_irq_handler from __handle_irq_event_percpu+0x44/0x130 __handle_irq_event_percpu from handle_irq_event+0x28/0x68 handle_irq_event from handle_level_irq+0x9c/0x170 handle_level_irq from generic_handle_domain_irq+0x2c/0x3c generic_handle_domain_irq from omap1_handle_irq+0x40/0x8c omap1_handle_irq from generic_handle_arch_irq+0x28/0x3c generic_handle_arch_irq from call_with_stack+0x1c/0x24 call_with_stack from __irq_svc+0x94/0xa8 Exception stack(0xc5255da0 to 0xc5255de8) 5da0: 00000001 c22fc620 00000000 00000000 c08384a8 c106fc00 00000000 c240c248 5dc0: c113a600 c3f6ec30 00000001 00000000 c22fc620 c5255df0 c22fc620 c0279a94 5de0: 60000013 ffffffff __irq_svc from clk_prepare_lock+0x4c/0xe4 clk_prepare_lock from clk_get_rate+0x10/0x74 clk_get_rate from uwire_setup_transfer+0x40/0x180 uwire_setup_transfer from spi_bitbang_transfer_one+0x2c/0x9c spi_bitbang_transfer_one from spi_transfer_one_message+0x2d0/0x664 spi_transfer_one_message from __spi_pump_transfer_message+0x29c/0x498 __spi_pump_transfer_message from __spi_sync+0x1f8/0x2e8 __spi_sync from spi_sync+0x24/0x40 spi_sync from ads7846_halfd_read_state+0x5c/0x1c0 ads7846_halfd_read_state from ads7846_irq+0x58/0x348 ads7846_irq from irq_thread_fn+0x1c/0x78 irq_thread_fn from irq_thread+0x120/0x228 irq_thread from kthread+0xc8/0xe8 kthread from ret_from_fork+0x14/0x28
As a quick fix, switch to a threaded IRQ which provides a stable system.
Signed-off-by: Aaro Koskinen aaro.koskinen@iki.fi Reviewed-by: Linus Walleij linus.walleij@linaro.org Signed-off-by: Helge Deller deller@gmx.de Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/video/fbdev/omap/lcd_dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/video/fbdev/omap/lcd_dma.c b/drivers/video/fbdev/omap/lcd_dma.c index f85817635a8c2..0da23c57e4757 100644 --- a/drivers/video/fbdev/omap/lcd_dma.c +++ b/drivers/video/fbdev/omap/lcd_dma.c @@ -432,8 +432,8 @@ static int __init omap_init_lcd_dma(void)
spin_lock_init(&lcd_dma.lock);
- r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0, - "LCD DMA", NULL); + r = request_threaded_irq(INT_DMA_LCD, NULL, lcd_dma_irq_handler, + IRQF_ONESHOT, "LCD DMA", NULL); if (r != 0) pr_err("unable to request IRQ for LCD DMA (error %d)\n", r);
From: Kartik Rajput kkartik@nvidia.com
[ Upstream commit 836b341cc8dab680acc06a7883bfeea89680b689 ]
Various Nvidia userspace applications and tests access following fuse via Fuse nvmem interface:
* odmid * odminfo * boot_security_info * public_key_hash * reserved_odm0 * reserved_odm1 * reserved_odm2 * reserved_odm3 * reserved_odm4 * reserved_odm5 * reserved_odm6 * reserved_odm7 * odm_lock * pk_h1 * pk_h2 * revoke_pk_h0 * revoke_pk_h1 * security_mode * system_fw_field_ratchet0 * system_fw_field_ratchet1 * system_fw_field_ratchet2 * system_fw_field_ratchet3 * optin_enable
Update tegra234_fuse_keepouts list to allow reading these fuse from nvmem sysfs interface.
Signed-off-by: Kartik Rajput kkartik@nvidia.com Link: https://lore.kernel.org/r/20241127061053.16775-1-kkartik@nvidia.com Signed-off-by: Thierry Reding treding@nvidia.com Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/soc/tegra/fuse/fuse-tegra30.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/soc/tegra/fuse/fuse-tegra30.c b/drivers/soc/tegra/fuse/fuse-tegra30.c index eb14e5ff5a0aa..e24ab5f7d2bf1 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra30.c +++ b/drivers/soc/tegra/fuse/fuse-tegra30.c @@ -647,15 +647,20 @@ static const struct nvmem_cell_lookup tegra234_fuse_lookups[] = { };
static const struct nvmem_keepout tegra234_fuse_keepouts[] = { - { .start = 0x01c, .end = 0x0c8 }, - { .start = 0x12c, .end = 0x184 }, + { .start = 0x01c, .end = 0x064 }, + { .start = 0x084, .end = 0x0a0 }, + { .start = 0x0a4, .end = 0x0c8 }, + { .start = 0x12c, .end = 0x164 }, + { .start = 0x16c, .end = 0x184 }, { .start = 0x190, .end = 0x198 }, { .start = 0x1a0, .end = 0x204 }, - { .start = 0x21c, .end = 0x250 }, - { .start = 0x25c, .end = 0x2f0 }, + { .start = 0x21c, .end = 0x2f0 }, { .start = 0x310, .end = 0x3d8 }, - { .start = 0x400, .end = 0x4f0 }, - { .start = 0x4f8, .end = 0x7e8 }, + { .start = 0x400, .end = 0x420 }, + { .start = 0x444, .end = 0x490 }, + { .start = 0x4bc, .end = 0x4f0 }, + { .start = 0x4f8, .end = 0x54c }, + { .start = 0x57c, .end = 0x7e8 }, { .start = 0x8d0, .end = 0x8d8 }, { .start = 0xacc, .end = 0xf00 } };
From: Jarkko Nikula jarkko.nikula@linux.intel.com
[ Upstream commit ccdb2e0e3b00d13df90ac7a0524dd855173f1171 ]
MIPI I3C HCI on Intel hardware requires a quirk where ring needs to stop and set to run again after resuming the halted controller. This is not expected from the MIPI I3C HCI specification and is Intel specific.
Add this quirk to generic aborted transfer handling and execute it only when ring is not in running state after a transfer error and attempted controller resume. This is the case on Intel hardware.
It is not fully clear to me what is the ring running state in generic hardware in such case. I would expect if ring is not running, then stop request is a no-op and run request is either required or does the same what controller resume would do.
Signed-off-by: Jarkko Nikula jarkko.nikula@linux.intel.com Link: https://lore.kernel.org/r/20241231115904.620052-1-jarkko.nikula@linux.intel.... Signed-off-by: Alexandre Belloni alexandre.belloni@bootlin.com Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/i3c/master/mipi-i3c-hci/dma.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/drivers/i3c/master/mipi-i3c-hci/dma.c b/drivers/i3c/master/mipi-i3c-hci/dma.c index 13adc58400942..fe955703e59b5 100644 --- a/drivers/i3c/master/mipi-i3c-hci/dma.c +++ b/drivers/i3c/master/mipi-i3c-hci/dma.c @@ -762,9 +762,26 @@ static bool hci_dma_irq_handler(struct i3c_hci *hci, unsigned int mask) complete(&rh->op_done);
if (status & INTR_TRANSFER_ABORT) { + u32 ring_status; + dev_notice_ratelimited(&hci->master.dev, "ring %d: Transfer Aborted\n", i); mipi_i3c_hci_resume(hci); + ring_status = rh_reg_read(RING_STATUS); + if (!(ring_status & RING_STATUS_RUNNING) && + status & INTR_TRANSFER_COMPLETION && + status & INTR_TRANSFER_ERR) { + /* + * Ring stop followed by run is an Intel + * specific required quirk after resuming the + * halted controller. Do it only when the ring + * is not in running state after a transfer + * error. + */ + rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE); + rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE | + RING_CTRL_RUN_STOP); + } } if (status & INTR_WARN_INS_STOP_MODE) dev_warn_ratelimited(&hci->master.dev,
From: Jarkko Nikula jarkko.nikula@linux.intel.com
[ Upstream commit 30bb1ce71215645fa6a92f4fa8cbb8f58db68f12 ]
Add a glue code for the MIPI I3C HCI on PCI bus with Intel Panther Lake I3C controller PCI IDs.
MIPI I3C HCI on Intel platforms has additional logic around the MIPI I3C HCI core logic. Those together create so called I3C slice on PCI bus. Intel specific initialization code does a reset cycle to the I3C slice before probing the MIPI I3C HCI part.
Signed-off-by: Jarkko Nikula jarkko.nikula@linux.intel.com Link: https://lore.kernel.org/r/20241231115904.620052-2-jarkko.nikula@linux.intel.... Signed-off-by: Alexandre Belloni alexandre.belloni@bootlin.com Signed-off-by: Sasha Levin sashal@kernel.org --- drivers/i3c/master/Kconfig | 11 ++ drivers/i3c/master/mipi-i3c-hci/Makefile | 1 + .../master/mipi-i3c-hci/mipi-i3c-hci-pci.c | 148 ++++++++++++++++++ 3 files changed, 160 insertions(+) create mode 100644 drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c
diff --git a/drivers/i3c/master/Kconfig b/drivers/i3c/master/Kconfig index 90dee3ec55209..77da199c7413e 100644 --- a/drivers/i3c/master/Kconfig +++ b/drivers/i3c/master/Kconfig @@ -57,3 +57,14 @@ config MIPI_I3C_HCI
This driver can also be built as a module. If so, the module will be called mipi-i3c-hci. + +config MIPI_I3C_HCI_PCI + tristate "MIPI I3C Host Controller Interface PCI support" + depends on MIPI_I3C_HCI + depends on PCI + help + Support for MIPI I3C Host Controller Interface compatible hardware + on the PCI bus. + + This driver can also be built as a module. If so, the module will be + called mipi-i3c-hci-pci. diff --git a/drivers/i3c/master/mipi-i3c-hci/Makefile b/drivers/i3c/master/mipi-i3c-hci/Makefile index 1f8cd5c48fdef..e3d3ef757035f 100644 --- a/drivers/i3c/master/mipi-i3c-hci/Makefile +++ b/drivers/i3c/master/mipi-i3c-hci/Makefile @@ -5,3 +5,4 @@ mipi-i3c-hci-y := core.o ext_caps.o pio.o dma.o \ cmd_v1.o cmd_v2.o \ dat_v1.o dct_v1.o \ hci_quirks.o +obj-$(CONFIG_MIPI_I3C_HCI_PCI) += mipi-i3c-hci-pci.o diff --git a/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c new file mode 100644 index 0000000000000..c6c3a3ec11eae --- /dev/null +++ b/drivers/i3c/master/mipi-i3c-hci/mipi-i3c-hci-pci.c @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI glue code for MIPI I3C HCI driver + * + * Copyright (C) 2024 Intel Corporation + * + * Author: Jarkko Nikula jarkko.nikula@linux.intel.com + */ +#include <linux/acpi.h> +#include <linux/idr.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/pci.h> +#include <linux/platform_device.h> + +struct mipi_i3c_hci_pci_info { + int (*init)(struct pci_dev *pci); +}; + +#define INTEL_PRIV_OFFSET 0x2b0 +#define INTEL_PRIV_SIZE 0x28 +#define INTEL_PRIV_RESETS 0x04 +#define INTEL_PRIV_RESETS_RESET BIT(0) +#define INTEL_PRIV_RESETS_RESET_DONE BIT(1) + +static DEFINE_IDA(mipi_i3c_hci_pci_ida); + +static int mipi_i3c_hci_pci_intel_init(struct pci_dev *pci) +{ + unsigned long timeout; + void __iomem *priv; + + priv = devm_ioremap(&pci->dev, + pci_resource_start(pci, 0) + INTEL_PRIV_OFFSET, + INTEL_PRIV_SIZE); + if (!priv) + return -ENOMEM; + + /* Assert reset, wait for completion and release reset */ + writel(0, priv + INTEL_PRIV_RESETS); + timeout = jiffies + msecs_to_jiffies(10); + while (!(readl(priv + INTEL_PRIV_RESETS) & + INTEL_PRIV_RESETS_RESET_DONE)) { + if (time_after(jiffies, timeout)) + break; + cpu_relax(); + } + writel(INTEL_PRIV_RESETS_RESET, priv + INTEL_PRIV_RESETS); + + return 0; +} + +static struct mipi_i3c_hci_pci_info intel_info = { + .init = mipi_i3c_hci_pci_intel_init, +}; + +static int mipi_i3c_hci_pci_probe(struct pci_dev *pci, + const struct pci_device_id *id) +{ + struct mipi_i3c_hci_pci_info *info; + struct platform_device *pdev; + struct resource res[2]; + int dev_id, ret; + + ret = pcim_enable_device(pci); + if (ret) + return ret; + + pci_set_master(pci); + + memset(&res, 0, sizeof(res)); + + res[0].flags = IORESOURCE_MEM; + res[0].start = pci_resource_start(pci, 0); + res[0].end = pci_resource_end(pci, 0); + + res[1].flags = IORESOURCE_IRQ; + res[1].start = pci->irq; + res[1].end = pci->irq; + + dev_id = ida_alloc(&mipi_i3c_hci_pci_ida, GFP_KERNEL); + if (dev_id < 0) + return dev_id; + + pdev = platform_device_alloc("mipi-i3c-hci", dev_id); + if (!pdev) + return -ENOMEM; + + pdev->dev.parent = &pci->dev; + device_set_node(&pdev->dev, dev_fwnode(&pci->dev)); + + ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); + if (ret) + goto err; + + info = (struct mipi_i3c_hci_pci_info *)id->driver_data; + if (info && info->init) { + ret = info->init(pci); + if (ret) + goto err; + } + + ret = platform_device_add(pdev); + if (ret) + goto err; + + pci_set_drvdata(pci, pdev); + + return 0; + +err: + platform_device_put(pdev); + ida_free(&mipi_i3c_hci_pci_ida, dev_id); + return ret; +} + +static void mipi_i3c_hci_pci_remove(struct pci_dev *pci) +{ + struct platform_device *pdev = pci_get_drvdata(pci); + int dev_id = pdev->id; + + platform_device_unregister(pdev); + ida_free(&mipi_i3c_hci_pci_ida, dev_id); +} + +static const struct pci_device_id mipi_i3c_hci_pci_devices[] = { + /* Panther Lake-H */ + { PCI_VDEVICE(INTEL, 0xe37c), (kernel_ulong_t)&intel_info}, + { PCI_VDEVICE(INTEL, 0xe36f), (kernel_ulong_t)&intel_info}, + /* Panther Lake-P */ + { PCI_VDEVICE(INTEL, 0xe47c), (kernel_ulong_t)&intel_info}, + { PCI_VDEVICE(INTEL, 0xe46f), (kernel_ulong_t)&intel_info}, + { }, +}; +MODULE_DEVICE_TABLE(pci, mipi_i3c_hci_pci_devices); + +static struct pci_driver mipi_i3c_hci_pci_driver = { + .name = "mipi_i3c_hci_pci", + .id_table = mipi_i3c_hci_pci_devices, + .probe = mipi_i3c_hci_pci_probe, + .remove = mipi_i3c_hci_pci_remove, +}; + +module_pci_driver(mipi_i3c_hci_pci_driver); + +MODULE_AUTHOR("Jarkko Nikula jarkko.nikula@intel.com"); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("MIPI I3C HCI driver on PCI bus");
linux-stable-mirror@lists.linaro.org
-
Sasha Levin