Check 5-level paging capability for 57 bits address width instead of checking 1GB large page capability.
Fixes: 53fc7ad6edf2 ("iommu/vt-d: Correctly calculate sagaw value of IOMMU") Cc: stable@vger.kernel.org Reported-by: Raghunathan Srinivasan raghunathan.srinivasan@intel.com Signed-off-by: Yi Liu yi.l.liu@intel.com --- drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 1f2cd43cf9bc..664499dddf0c 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -399,7 +399,7 @@ static unsigned long __iommu_calculate_sagaw(struct intel_iommu *iommu) { unsigned long fl_sagaw, sl_sagaw;
- fl_sagaw = BIT(2) | (cap_fl1gp_support(iommu->cap) ? BIT(3) : 0); + fl_sagaw = BIT(2) | (cap_5lp_support(iommu->cap) ? BIT(3) : 0); sl_sagaw = cap_sagaw(iommu->cap);
/* Second level only. */
On 2022/9/16 15:12, Yi Liu wrote:
Check 5-level paging capability for 57 bits address width instead of checking 1GB large page capability.
Fixes: 53fc7ad6edf2 ("iommu/vt-d: Correctly calculate sagaw value of IOMMU") Cc:stable@vger.kernel.org Reported-by: Raghunathan Srinivasanraghunathan.srinivasan@intel.com
This fix is fine to me. Thanks for doing this.
Raghu, what do you think of this fixing? If it works for you, can I have your reviewed-by.
Best regards, baolu
On Fri, Sep 16, 2022 at 12:12:11AM -0700, Yi Liu wrote:
Check 5-level paging capability for 57 bits address width instead of checking 1GB large page capability.
Fixes: 53fc7ad6edf2 ("iommu/vt-d: Correctly calculate sagaw value of IOMMU") Cc: stable@vger.kernel.org Reported-by: Raghunathan Srinivasan raghunathan.srinivasan@intel.com Signed-off-by: Yi Liu yi.l.liu@intel.com
Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com
drivers/iommu/intel/iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 1f2cd43cf9bc..664499dddf0c 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -399,7 +399,7 @@ static unsigned long __iommu_calculate_sagaw(struct intel_iommu *iommu) { unsigned long fl_sagaw, sl_sagaw;
- fl_sagaw = BIT(2) | (cap_fl1gp_support(iommu->cap) ? BIT(3) : 0);
- fl_sagaw = BIT(2) | (cap_5lp_support(iommu->cap) ? BIT(3) : 0); sl_sagaw = cap_sagaw(iommu->cap);
/* Second level only. */ -- 2.34.1
From: Liu, Yi L yi.l.liu@intel.com Sent: Friday, September 16, 2022 3:12 PM
Check 5-level paging capability for 57 bits address width instead of checking 1GB large page capability.
Fixes: 53fc7ad6edf2 ("iommu/vt-d: Correctly calculate sagaw value of IOMMU") Cc: stable@vger.kernel.org Reported-by: Raghunathan Srinivasan raghunathan.srinivasan@intel.com Signed-off-by: Yi Liu yi.l.liu@intel.com
Reviewed-by: Kevin Tian kevin.tian@intel.com
On 9/16/22 3:12 PM, Yi Liu wrote:
Check 5-level paging capability for 57 bits address width instead of checking 1GB large page capability.
Fixes: 53fc7ad6edf2 ("iommu/vt-d: Correctly calculate sagaw value of IOMMU") Cc:stable@vger.kernel.org Reported-by: Raghunathan Srinivasanraghunathan.srinivasan@intel.com Signed-off-by: Yi Liuyi.l.liu@intel.com
Queued for v6.0. Thank you very much!
https://lore.kernel.org/linux-iommu/20220921024054.3570256-1-baolu.lu@linux....
Best regards, baolu
On 2022/9/21 10:44, Baolu Lu wrote:
On 9/16/22 3:12 PM, Yi Liu wrote:
Check 5-level paging capability for 57 bits address width instead of checking 1GB large page capability.
Fixes: 53fc7ad6edf2 ("iommu/vt-d: Correctly calculate sagaw value of IOMMU") Cc:stable@vger.kernel.org Reported-by: Raghunathan Srinivasanraghunathan.srinivasan@intel.com Signed-off-by: Yi Liuyi.l.liu@intel.com
Queued for v6.0. Thank you very much!
https://lore.kernel.org/linux-iommu/20220921024054.3570256-1-baolu.lu@linux....
grt. btw. how about below? not sure why it didn't show up in this series. :(
https://lore.kernel.org/linux-iommu/BN9PR11MB5276F062B5C0C08F10EFB49F8C4C9@B...
Best regards, baolu
On 2022/9/21 11:35, Yi Liu wrote:
On 2022/9/21 10:44, Baolu Lu wrote:
On 9/16/22 3:12 PM, Yi Liu wrote:
Check 5-level paging capability for 57 bits address width instead of checking 1GB large page capability.
Fixes: 53fc7ad6edf2 ("iommu/vt-d: Correctly calculate sagaw value of IOMMU") Cc:stable@vger.kernel.org Reported-by: Raghunathan Srinivasanraghunathan.srinivasan@intel.com Signed-off-by: Yi Liuyi.l.liu@intel.com
Queued for v6.0. Thank you very much!
https://lore.kernel.org/linux-iommu/20220921024054.3570256-1-baolu.lu@linux....
grt. btw. how about below? not sure why it didn't show up in this series. 🙁
https://lore.kernel.org/linux-iommu/BN9PR11MB5276F062B5C0C08F10EFB49F8C4C9@B...
This is not a fix. I will queue it for v6.1-rc1 later.
Best regards, baolu
linux-stable-mirror@lists.linaro.org
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Baolu Lu -
Jerry Snitselaar -
Tian, Kevin -
Yi Liu