On Thu, Nov 06, 2025 at 07:13:28AM +0000, Hogander, Jouni wrote:

On Wed, 2025-11-05 at 19:10 +0200, Ville Syrjala wrote:

...

From: Ville Syrjälä ville.syrjala@linux.intel.com

The selective fetch code doesn't handle asycn flips correctly. There is a nonsense check for async flips in intel_psr2_sel_fetch_config_valid() but that only gets called for modesets/fastsets and thus does nothing for async flips.

Currently intel_async_flip_check_hw() is very unhappy as the selective fetch code pulls in planes that are not even async flips capable.

Reject async flips when selective fetch is enabled, until someone fixes this properly (ie. disable selective fetch while async flips are being issued).

Is it ok to allow psr2 hw tracking?

No idea.

Not directly related to this patch so:

Reviewed-by: Jouni Högander jouni.hogander@intel.com

Ta.

...

Cc: stable@vger.kernel.org Signed-off-by: Ville Syrjälä ville.syrjala@linux.intel.com

---

drivers/gpu/drm/i915/display/intel_display.c | 8 ++++++++  drivers/gpu/drm/i915/display/intel_psr.c     | 6 ------  2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 42ec78798666..10583592fefe 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -6020,6 +6020,14 @@ static int intel_async_flip_check_uapi(struct intel_atomic_state *state,   return -EINVAL;   }

• /* FIXME: selective fetch should be disabled for async flips

*/

• if (new_crtc_state->enable_psr2_sel_fetch) {

• drm_dbg_kms(display->drm,
  

• 	    "[CRTC:%d:%s] async flip disallowed with
  

PSR2 selective fetch\n",

• 	    crtc->base.base.id, crtc->base.name);
  

• return -EINVAL;
  

• }

for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,        new_plane_state, i) {   if (plane->pipe != crtc->pipe) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 05014ffe3ce1..65d77aea9536 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1296,12 +1296,6 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp,   return false;   }

• if (crtc_state->uapi.async_flip) {

• drm_dbg_kms(display->drm,
  

• 	    "PSR2 sel fetch not enabled, async flip
  

enabled\n");

• return false;
  

• }

return crtc_state->enable_psr2_sel_fetch = true;  }