As the title
Best regards
Wally Mao(毛卫洋)
ARM China Field Application Engineer
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Hi,
Here is version 3 of fix to armv7-m build failure in
sigreturn_codes.S. It is based on .org directive
Dave's suggestion on last email in [1].
It uses conditional compilation and it uses .org
directive to keep sigreturn_codes layout.
Note I did not use ARM and THUMB macros because
those switch between CONFIG_THUMB2_KERNEL and not.
On v7a kernel we need both arm and thumb snipets
regardless of CONFIG_THUMB2_KERNEL setting.
And conditional compilation only kicks in with
CONFIG_CPU_THUMBONLY, for that local ARM_INSTR
macro is created.
Version 1 [1] used conditional compilation and added
thumb2 nop instructions in CONFIG_CPU_THUMBONLY
Version 2 [2] tried to use '.acrh armv4t' directive
to allow both arm and thumb2 opcodes, but solution
deemed to be too fragile.
Fix was tested
linux-next with efm32_defconfig build (along with few other fixes)
rmk-next BE/LE arndale build/boot and LTP rt_sigaction0? tests run
Dave, I've added your name with Suggested-by tag, please
let me know if it is not OK with you, I'll remove it then.
Uwe, is it possible for you to test that this fix runs on
efm32? Sorry, for multiple requests.
Thanks,
Victor
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-November/210393.…
[2] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-November/210949.…
Victor Kamensky (1):
ARM: signal: fix armv7-m build issue in sigreturn_codes.S
arch/arm/kernel/sigreturn_codes.S | 40 ++++++++++++++++++++++++++++++---------
1 file changed, 31 insertions(+), 9 deletions(-)
--
1.8.1.4
The 'u64 last_update' variable isn't used now, remove it to save a
bit space.
Signed-off-by: Alex Shi <alex.shi(a)linaro.org>
---
include/linux/sched.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 6f7ffa4..ac68802 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -831,8 +831,6 @@ struct sched_domain {
unsigned int balance_interval; /* initialise to 1. units in ms. */
unsigned int nr_balance_failed; /* initialise to 0 */
- u64 last_update;
-
/* idle_balance() stats */
u64 max_newidle_lb_cost;
unsigned long next_decay_max_lb_cost;
--
1.8.1.2
ARM_PATCH_PHYS_VIRT is enabled by default for clps711x systems
Introduction of this config as default will enable phy-to-virt and
virt-to-phy translation function at boot and module loading time
and enforce dynamic reallocation of memory.
This config is mutually exclusive to XIP_KERNEL, which is used in
systems with NOR flash devices
Requesting platform maintainers to evaluate the changes on the
board and comment on the changes, as I dont have the board for
testing.
Signed-off-by: panchaxari <panchaxari.prasannamurthy(a)linaro.org>
Cc: Linus Walleij <linus.walleij(a)linaro.org>
Tested-by: Alexander Shiyan <shc_work(a)mail.ru>
Cc: Russell King <linux(a)arm.linux.org.uk>
Cc: Olof Johansson <olof(a)lixom.net>
Cc: linux-arm-kernel(a)lists.infradead.org
V1->V2
Re-orderd the config according to alphabetical sorting order.
---
arch/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1ad6fb6..1b5a182 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -371,6 +371,7 @@ config ARCH_AT91
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
select ARCH_REQUIRE_GPIOLIB
+ select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select CLKSRC_MMIO
--
1.7.10.4
Hi,
Here is proposal for armv7-m build failure in sigreturn_codes.S. The
armv7-m build issue was discussed in [1].
Proposed solution is based on conditional compilation. If
CONFIG_CPU_THUMBONLY is set instead of arm opcodes nops in thumb mode
are used. I've tried to wrap conditional compilation as nice as I
found possible. Other suggestions/approaches are welcome.
Fix was tested:
linux-next with efm32_defconfig build (along with few other fixes)
rmk-next BE/LE arndale build/boot and LTP rt_sigaction0? tests run
Uwe, is it possible for you to test that the fix runs on efm32. Also
if the platform can run LTP, you give a spin to LTP rt_sigaction0?
tests that would be great. It is known that this tests covers code
under change.
If folks don't like this fix, I have another variant as I mention
in [1] that backs out 574e2b5111e13827da501771b27d92e6e3f2e3d7
(ARM: signal: sigreturn_codes should be endian neutral to work in BE8)
and use asm/opcodes to byteswap manually crafted instructions.
Thanks,
Victor
[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-November/209334.…
Victor Kamensky (1):
ARM: signal: fix armv7-m build issue in sigreturn_codes.S
arch/arm/kernel/sigreturn_codes.S | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
--
1.8.1.4
CC to kernel mailing list.
What's you expected result for twd?
On 11/14/2013 08:36 AM, Shaojie Sun wrote:
> Hi all
> When I enble NO_HZ_FULL and NO_HZ_FULL_ALL option in K3V2 board.
> I find that the twd interrupt will be trigged in a large time pre
> second.
> In our landing team branch, we used lsk branch.
>
> Do you find this bugs on your board? And how to resolve it?
>
>
>>> cat /proc/interrupts
>
> CPU0 CPU1
> 29: 293 395 GIC twd
>
--
Thanks
Alex