linaro-kernel May 2013

linaro-kernel@lists.linaro.org

69 participants
72 discussions

[PATCH] cpufreq: MAINTAINERS: Add git tree path for ARM specific updates

by Viresh Kumar

To reduce cpufreq maintenance load on Rafael, ARM specific patches would be Applied by me now. Rafael will pull in these changes from time to time (at rc's). Additionally I would be sending him pull request for every merge window and rc's (for fixes). Web interface of my tree is present here: https://git.linaro.org/gitweb?p=people/vireshk/linux.git;a=summary Branch names would be: cpufreq-next and cpufreq-fixes. Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org> --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index fd3a495..50c81bd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2216,6 +2216,7 @@ L: cpufreq(a)vger.kernel.org L: linux-pm(a)vger.kernel.org S: Maintained T: git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git +T: git://git.linaro.org/people/vireshk/linux.git (For ARM Updates) F: drivers/cpufreq/ F: include/linux/cpufreq.h -- 1.7.12.rc2.18.g61b472e

11 years, 9 months

[PATCH] ACPICA: Remove redundant macro defines for ACPI_DEBUG_PRINT() and ACPI_DEBUG_PRINT_RAW()

by Hanjun Guo

In commit 0377b5acba2 (ACPICA: Merge all debug output macros into a single file, acoutput.), the patch introduces redundant macro defines for ACPI_DEBUG_PRINT() and ACPI_DEBUG_PRINT_RAW(), just remove it. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- include/acpi/acoutput.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/acpi/acoutput.h b/include/acpi/acoutput.h index 4f52ea7..e1c7474 100644 --- a/include/acpi/acoutput.h +++ b/include/acpi/acoutput.h @@ -447,8 +447,6 @@ #define ACPI_DUMP_TABLES(a, b) #define ACPI_DUMP_PATHNAME(a, b, c, d) #define ACPI_DUMP_BUFFER(a, b) -#define ACPI_DEBUG_PRINT(pl) -#define ACPI_DEBUG_PRINT_RAW(pl) #define ACPI_IS_DEBUG_ENABLED(level, component) 0 /* Return macros must have a return statement at the minimum */ -- 1.8.2.1

11 years, 9 months

Re: [linux-pm] ARM hibernation / suspend-to-disk

by Viresh Kumar

On 29 May 2013 13:40, Jan Glauber <jan.glauber(a)gmail.com> wrote: > what's the status of suspend-to-disk on ARM? The most recent discussion I > found is: > http://lists.linuxfoundation.org/pipermail/linux-pm/2012-November/034997.ht… > > with no replies at all. Is anyone still working on that? Anyone got it running? > > I tried the patch above (on top of LTS 3.4) and got stuck forever, the last > thing on the console was: > > root@omap5:/sys/power# echo disk > state > [ 2015.641540] PM: Syncing filesystems ... done. > [ 2015.666870] PM: Preallocating image memory... done (allocated 16957 pages) > [ 2016.062011] PM: Allocated 67828 kbytes in 0.38 seconds (178.49 MB/s) > > Any hint how to debug that? I know it is still broken and I had discussion with Kevin in past regarding that. See below. On 13 March 2013 22:57, Kevin Hilman <khilman(a)linaro.org> wrote: > Viresh Kumar <viresh.kumar(a)linaro.org> writes: > >> Hi Guys, >> >> As discussed during connect about "HIBERNATION support for ARM platforms", >> this is my last mail on this, almost a year back, where i tried my best to get >> relevant answer from Amit. >> >> Probably he missed all my mails then, but this might be a good starting point >> for this discussion as i did some testing on hibernation earlier. >> >> https://lkml.org/lkml/2012/2/6/8 > > I think the reason that ARM sub-arches are not setting things up is > because ARM has never supported hibernation in mainline. > > The most recent patch to add basic support[1] references the various > discussions on what is needed and still missing. > > Kevin > > [1] http://marc.info/?l=linux-omap&m=135292458209355&w=2

11 years, 9 months

[PATCH] arm64: compiling issue, need add include/asm/vga.h file

by Chen Gang

For compiling with allmodconfig, need vga.h file, so copy it from arm32. The related information: aarch64-linux-gnu-gcc -Wp,-MD,drivers/gpu/drm/.drm_irq.o.d -nostdinc -isystem /usr/bin/../lib/gcc/aarch64-linux-gnu/4.7.3/include -I/root/linux-next/arch/arm64/include -Iarch/arm64/include/generated -Iinclude -I/root/linux-next/arch/arm64/include/uapi -Iarch/arm64/include/generated/uapi -I/root/linux-next/include/uapi -Iinclude/generated/uapi -include /root/linux-next/include/linux/kconfig.h -D__KERNEL__ -mlittle-endian -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Wno-format-security -fno-delete-null-pointer-checks -Os -mgeneral-regs-only -fno-reorder-blocks -fno-ipa-cp-clone -fno-partial-inlining -Wframe-larger-than=2048 -fno-stack-protector -Wno-unused-but-set-variable -fno-omit-frame-pointer -fno-optimize-sibling-calls -g -femit-struct-debug-baseonly -fno-var-tracking -fno-inline-functions-called-once -Wdeclaration-after-statement -Wno-pointer-sign -fno-strict-overflow -fconserve-stack -DCC_HAV E_ASM_GOT O -Iinclude/drm -W -DMODULE -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(drm_irq)" -D"KBUILD_MODNAME=KBUILD_STR(drm)" -c -o drivers/gpu/drm/.tmp_drm_irq.o drivers/gpu/drm/drm_irq.c The related error: include/video/vga.h: At top level: include/video/vga.h:22:21: fatal error: asm/vga.h: No such file or directory compilation terminated. make[3]: *** [drivers/gpu/drm/drm_irq.o] Error 1 make[2]: *** [drivers/gpu/drm] Error 2 make[1]: *** [drivers/gpu] Error 2 make: *** [drivers] Error 2 Signed-off-by: root <root(a)dhcp122.asianux.net> --- arch/arm64/include/asm/vga.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 arch/arm64/include/asm/vga.h diff --git a/arch/arm64/include/asm/vga.h b/arch/arm64/include/asm/vga.h new file mode 100644 index 0000000..91f4021 --- /dev/null +++ b/arch/arm64/include/asm/vga.h @@ -0,0 +1,13 @@ +#ifndef ASMARM_VGA_H +#define ASMARM_VGA_H + +#include <linux/io.h> + +extern unsigned long vga_base; + +#define VGA_MAP_MEM(x,s) (vga_base + (x)) + +#define vga_readb(x) (*((volatile unsigned char *)x)) +#define vga_writeb(x,y) (*((volatile unsigned char *)y) = (x)) + +#endif -- 1.7.11.7

11 years, 9 months

[PATCH] cpuidle: improve governor Kconfig options

by Daniel Lezcano

Each governor is suitable for different kernel configurations: the menu governor suits better for a tickless system, while the ladder governor fits better for a periodic timer tick system. The Kconfig does not allow to [un]select a governor, thus both are compiled in the kernel but the init order makes the menu governor to be the last one to be registered, so becoming the default. The only way to switch back to the ladder governor is to enable the sysfs governor switch in the kernel command line. Because it seems nobody complained about this, the menu governor is used by default most of the time on the system, having both governors is not really necessary on a tickless system but there isn't a config option to disable one or another governor. Create a submenu for cpuidle and add a label for each governor, so we can see the option in the menu config and enable/disable it. The governors will be enabled depending on the CONFIG_NO_HZ option: - If CONFIG_NO_HZ is set, then the menu governor is selected and the ladder governor is optional, defaulting to 'no' - If CONFIG_NO_HZ is not set, then the ladder governor is selected and the menu governor is optional, defaulting to 'no' Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org> --- drivers/cpuidle/Kconfig | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig index c4cc27e..90c2f39 100644 --- a/drivers/cpuidle/Kconfig +++ b/drivers/cpuidle/Kconfig @@ -1,7 +1,9 @@ -config CPU_IDLE +menuconfig CPU_IDLE bool "CPU idle PM support" default y if ACPI || PPC_PSERIES + select CPU_IDLE_GOV_LADDER if (!NO_HZ && !NO_HZ_IDLE) + select CPU_IDLE_GOV_MENU if (NO_HZ || NO_HZ_IDLE) help CPU idle is a generic framework for supporting software-controlled idle processor power management. It includes modular cross-platform @@ -9,9 +11,10 @@ config CPU_IDLE If you're using an ACPI-enabled platform, you should say Y here. +if CPU_IDLE + config CPU_IDLE_MULTIPLE_DRIVERS bool "Support multiple cpuidle drivers" - depends on CPU_IDLE default n help Allows the cpuidle framework to use different drivers for each CPU. @@ -19,24 +22,19 @@ config CPU_IDLE_MULTIPLE_DRIVERS states. If unsure say N. config CPU_IDLE_GOV_LADDER - bool - depends on CPU_IDLE - default y + bool "Ladder governor (for periodic timer tick)" + default n if (NO_HZ || NO_HZ_IDLE) config CPU_IDLE_GOV_MENU - bool - depends on CPU_IDLE && NO_HZ - default y + bool "Menu governor (for tickless system)" + default n if (!NO_HZ && !NO_HZ_IDLE) config ARCH_NEEDS_CPU_IDLE_COUPLED def_bool n -if CPU_IDLE - config CPU_IDLE_CALXEDA bool "CPU Idle Driver for Calxeda processors" depends on ARCH_HIGHBANK help Select this to enable cpuidle on Calxeda processors. - endif -- 1.7.9.5

11 years, 9 months

[RFC] arm64: Add support to pass earlyprintk argument via device tree

by Pranavkumar Sawargaonkar

This patch adds support for defining and passing earlyprintk related information i.e. device and address information via device tree by adding it inside "chosen" node. This will help user to just specify "earlyprintk" from bootargs without actually knowing the address and device to enable earlyprintk. Mechanism: One can just append earlyprintk=device-type,address (same as we pass through command line) in "/chosen" node to notify kernel which is the earlyprintk device and what is its address. Backward Compatibility: This patch also allows existing method of specifying earlyprintk parameter via bootargs. Existing method i.e. passing via bootargs will still have precedence over device tree i.e. if one specifies earlyprintk=device-type,address in bootargs then kernel will use information from bootargs instead of device tree. If user just specifies earlyprintk (without =...) then kernel will look for device tree earlyprintk parameter. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar(a)linaro.org> Signed-off-by: Anup Patel <anup.patel(a)linaro.org> --- arch/arm64/kernel/early_printk.c | 7 +++++++ arch/arm64/kernel/setup.c | 22 +++++++++++++++++++++- 2 files changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/arm64/kernel/early_printk.c b/arch/arm64/kernel/early_printk.c index fbb6e18..4e6f845 100644 --- a/arch/arm64/kernel/early_printk.c +++ b/arch/arm64/kernel/early_printk.c @@ -29,6 +29,8 @@ static void __iomem *early_base; static void (*printch)(char ch); +extern char *earlyprintk_dt_args; + /* * PL011 single character TX. */ @@ -116,6 +118,11 @@ static int __init setup_early_printk(char *buf) phys_addr_t paddr = 0; if (!buf) { + /* Try to check if Device Tree has this argument or not ? */ + buf = earlyprintk_dt_args; + } + + if (!buf) { pr_warning("No earlyprintk arguments passed.\n"); return 0; } diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 6a9a532..94ce7a9 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -60,6 +60,9 @@ EXPORT_SYMBOL(processor_id); unsigned int elf_hwcap __read_mostly; EXPORT_SYMBOL_GPL(elf_hwcap); +char *earlyprintk_dt_args; +EXPORT_SYMBOL_GPL(earlyprintk_dt_args); + static const char *cpu_name; static const char *machine_name; phys_addr_t __fdt_pointer __initdata; @@ -122,6 +125,23 @@ static void __init setup_processor(void) elf_hwcap = 0; } +int __init early_init_dt_scan_chosen_arm64(unsigned long node, + const char *uname, + int depth, void *data) +{ + char *prop; + + /* Check if this is chosen node */ + if (early_init_dt_scan_chosen(node, uname, depth, data) == 0) + return 0; + + prop = of_get_flat_dt_prop(node, "earlyprintk", NULL); + if (prop) + earlyprintk_dt_args = prop; + + return 1; +} + static void __init setup_machine_fdt(phys_addr_t dt_phys) { struct boot_param_header *devtree; @@ -165,7 +185,7 @@ static void __init setup_machine_fdt(phys_addr_t dt_phys) pr_info("Machine: %s\n", machine_name); /* Retrieve various information from the /chosen node */ - of_scan_flat_dt(early_init_dt_scan_chosen, boot_command_line); + of_scan_flat_dt(early_init_dt_scan_chosen_arm64, boot_command_line); /* Initialize {size,address}-cells info */ of_scan_flat_dt(early_init_dt_scan_root, NULL); /* Setup memory, calling early_init_dt_add_memory_arch */ -- 1.7.9.5

11 years, 9 months

[PATCH V2] cpuidle: improve governor Kconfig options

by Daniel Lezcano

Each governor is suitable for different kernel configurations: the menu governor suits better for a tickless system, while the ladder governor fits better for a periodic timer tick system. The Kconfig does not allow to [un]select a governor, thus both are compiled in the kernel but the init order makes the menu governor to be the last one to be registered, so becoming the default. The only way to switch back to the ladder governor is to enable the sysfs governor switch in the kernel command line. Because it seems nobody complained about this, the menu governor is used by default most of the time on the system, having both governors is not really necessary on a tickless system but there isn't a config option to disable one or another governor. Create a submenu for cpuidle and add a label for each governor, so we can see the option in the menu config and enable/disable it. The governors will be enabled depending on the CONFIG_NO_HZ option: - If CONFIG_NO_HZ is set, then the menu governor is selected and the ladder governor is optional, defaulting to 'yes' - If CONFIG_NO_HZ is not set, then the ladder governor is selected and the menu governor is optional, defaulting to 'yes' Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org> --- drivers/cpuidle/Kconfig | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/cpuidle/Kconfig b/drivers/cpuidle/Kconfig index c4cc27e..e997f15 100644 --- a/drivers/cpuidle/Kconfig +++ b/drivers/cpuidle/Kconfig @@ -1,7 +1,9 @@ -config CPU_IDLE +menuconfig CPU_IDLE bool "CPU idle PM support" default y if ACPI || PPC_PSERIES + select CPU_IDLE_GOV_LADDER if (!NO_HZ && !NO_HZ_IDLE) + select CPU_IDLE_GOV_MENU if (NO_HZ || NO_HZ_IDLE) help CPU idle is a generic framework for supporting software-controlled idle processor power management. It includes modular cross-platform @@ -9,9 +11,10 @@ config CPU_IDLE If you're using an ACPI-enabled platform, you should say Y here. +if CPU_IDLE + config CPU_IDLE_MULTIPLE_DRIVERS bool "Support multiple cpuidle drivers" - depends on CPU_IDLE default n help Allows the cpuidle framework to use different drivers for each CPU. @@ -19,24 +22,19 @@ config CPU_IDLE_MULTIPLE_DRIVERS states. If unsure say N. config CPU_IDLE_GOV_LADDER - bool - depends on CPU_IDLE + bool "Ladder governor (for periodic timer tick)" default y config CPU_IDLE_GOV_MENU - bool - depends on CPU_IDLE && NO_HZ + bool "Menu governor (for tickless system)" default y config ARCH_NEEDS_CPU_IDLE_COUPLED def_bool n -if CPU_IDLE - config CPU_IDLE_CALXEDA bool "CPU Idle Driver for Calxeda processors" depends on ARCH_HIGHBANK help Select this to enable cpuidle on Calxeda processors. - endif -- 1.7.9.5

11 years, 9 months

Re: [PATCH v5] clocksource: add Freescale Vybrid pit timer support

by Daniel Lezcano

On 05/28/2013 11:21 AM, Jingchang Lu wrote: > Add Freescale Vybrid Family period interrupt timer support. > > Signed-off-by: Jingchang Lu <b35083(a)freescale.com> > --- Reviewed-by: Daniel Lezcano <daniel.lezcano(a)linaro.org> > v5: > Follow internal suggestions to name the SoC family as VF. > Add comment for min and max clockevent delta. > Add clockevent device irq initialization. > Remove IRQF_DISABLED flag. > v4: > Use family name names driver and symbol instead of SoC name. > Remove redundant code. > Use BUG_ON instead of WARN_ON. > Add necessory comment information. > v3: > Move the pit driver adding from arch to drivers/clocksource. > v2: > Use CLOCKSOURCE_OF_DECLARE init pit timer. > Add ONESHOT mode support. > > drivers/clocksource/Kconfig | 5 + > drivers/clocksource/Makefile | 1 + > drivers/clocksource/vf_pit_timer.c | 194 +++++++++++++++++++++++++++++++++++++ > 3 files changed, 200 insertions(+) > create mode 100644 drivers/clocksource/vf_pit_timer.c > > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig > index f151c6c..0a04257 100644 > --- a/drivers/clocksource/Kconfig > +++ b/drivers/clocksource/Kconfig > @@ -85,3 +85,8 @@ config CLKSRC_SAMSUNG_PWM > Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver > for all devicetree enabled platforms. This driver will be > needed only on systems that do not have the Exynos MCT available. > + > +config VF_PIT_TIMER > + bool > + help > + Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. > diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile > index 8d979c7..36a9ac1 100644 > --- a/drivers/clocksource/Makefile > +++ b/drivers/clocksource/Makefile > @@ -26,6 +26,7 @@ obj-$(CONFIG_ARCH_BCM) += bcm_kona_timer.o > obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence_ttc_timer.o > obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o > obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o > +obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o > > obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o > obj-$(CONFIG_CLKSRC_METAG_GENERIC) += metag_generic.o > diff --git a/drivers/clocksource/vf_pit_timer.c b/drivers/clocksource/vf_pit_timer.c > new file mode 100644 > index 0000000..598399d > --- /dev/null > +++ b/drivers/clocksource/vf_pit_timer.c > @@ -0,0 +1,194 @@ > +/* > + * Copyright 2012-2013 Freescale Semiconductor, Inc. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License > + * as published by the Free Software Foundation; either version 2 > + * of the License, or (at your option) any later version. > + */ > + > +#include <linux/interrupt.h> > +#include <linux/clockchips.h> > +#include <linux/clk.h> > +#include <linux/of_address.h> > +#include <linux/of_irq.h> > +#include <asm/sched_clock.h> > + > +/* > + * Each pit takes 0x10 Bytes register space > + */ > +#define PITMCR 0x00 > +#define PIT0_OFFSET 0x100 > +#define PITn_OFFSET(n) (PIT0_OFFSET + 0x10 * (n)) > +#define PITLDVAL 0x00 > +#define PITCVAL 0x04 > +#define PITTCTRL 0x08 > +#define PITTFLG 0x0c > + > +#define PITMCR_MDIS (0x1 << 1) > + > +#define PITTCTRL_TEN (0x1 << 0) > +#define PITTCTRL_TIE (0x1 << 1) > +#define PITCTRL_CHN (0x1 << 2) > + > +#define PITTFLG_TIF 0x1 > + > +static void __iomem *clksrc_base; > +static void __iomem *clkevt_base; > +static unsigned long cycle_per_jiffy; > + > +static inline void pit_timer_enable(void) > +{ > + __raw_writel(PITTCTRL_TEN | PITTCTRL_TIE, clkevt_base + PITTCTRL); > +} > + > +static inline void pit_timer_disable(void) > +{ > + __raw_writel(0, clkevt_base + PITTCTRL); > +} > + > +static inline void pit_irq_acknowledge(void) > +{ > + __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG); > +} > + > +static unsigned int pit_read_sched_clock(void) > +{ > + return __raw_readl(clksrc_base + PITCVAL); > +} > + > +static int __init pit_clocksource_init(unsigned long rate) > +{ > + /* set the max load value and start the clock source counter */ > + __raw_writel(0, clksrc_base + PITTCTRL); > + __raw_writel(~0UL, clksrc_base + PITLDVAL); > + __raw_writel(PITTCTRL_TEN, clksrc_base + PITTCTRL); > + > + setup_sched_clock(pit_read_sched_clock, 32, rate); > + return clocksource_mmio_init(clksrc_base + PITCVAL, "vf-pit", rate, > + 300, 32, clocksource_mmio_readl_down); > +} > + > +static int pit_set_next_event(unsigned long delta, > + struct clock_event_device *unused) > +{ > + /* > + * set a new value to PITLDVAL register will not restart the timer, > + * to abort the current cycle and start a timer period with the new > + * value, the timer must be disabled and enabled again. > + * and the PITLAVAL should be set to delta minus one according to pit > + * hardware requirement. > + */ > + pit_timer_disable(); > + __raw_writel(delta - 1, clkevt_base + PITLDVAL); > + pit_timer_enable(); > + > + return 0; > +} > + > +static void pit_set_mode(enum clock_event_mode mode, > + struct clock_event_device *evt) > +{ > + switch (mode) { > + case CLOCK_EVT_MODE_PERIODIC: > + pit_set_next_event(cycle_per_jiffy, evt); > + break; > + default: > + break; > + } > +} > + > +static irqreturn_t pit_timer_interrupt(int irq, void *dev_id) > +{ > + struct clock_event_device *evt = dev_id; > + > + pit_irq_acknowledge(); > + > + /* > + * pit hardware doesn't support oneshot, it will generate an interrupt > + * and reload the counter value from PITLDVAL when PITCVAL reach zero, > + * and start the counter again. So software need to disable the timer > + * to stop the counter loop in ONESHOT mode. > + */ > + if (likely(evt->mode == CLOCK_EVT_MODE_ONESHOT)) > + pit_timer_disable(); > + > + evt->event_handler(evt); > + > + return IRQ_HANDLED; > +} > + > +static struct clock_event_device clockevent_pit = { > + .name = "VF pit timer", > + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, > + .set_mode = pit_set_mode, > + .set_next_event = pit_set_next_event, > + .rating = 300, > +}; > + > +static struct irqaction pit_timer_irq = { > + .name = "VF pit timer", > + .flags = IRQF_TIMER | IRQF_IRQPOLL, > + .handler = pit_timer_interrupt, > + .dev_id = &clockevent_pit, > +}; > + > +static int __init pit_clockevent_init(unsigned long rate, int irq) > +{ > + __raw_writel(0, clkevt_base + PITTCTRL); > + __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG); > + > + BUG_ON(setup_irq(irq, &pit_timer_irq)); > + > + clockevent_pit.cpumask = cpumask_of(0); > + clockevent_pit.irq = irq; > + /* > + * The value for the LDVAL register trigger is calculated as: > + * LDVAL trigger = (period / clock period) - 1 > + * The pit is a 32-bit down count timer, when the conter value > + * reaches 0, it will generate an interrupt, thus the minimal > + * LDVAL trigger value is 1. And then the min_delta is > + * minimal LDVAL trigger value + 1, and the max_delta is full 32-bit. > + */ > + clockevents_config_and_register(&clockevent_pit, rate, 2, 0xffffffff); > + > + return 0; > +} > + > +static void __init pit_timer_init(struct device_node *np) > +{ > + struct clk *pit_clk; > + void __iomem *timer_base; > + unsigned long clk_rate; > + int irq; > + > + timer_base = of_iomap(np, 0); > + BUG_ON(!timer_base); > + > + /* > + * PIT0 and PIT1 can be chained to build a 64-bit timer, > + * so choose PIT2 as clocksource, PIT3 as clockevent device, > + * and leave PIT0 and PIT1 unused for anyone else who needs them. > + */ > + clksrc_base = timer_base + PITn_OFFSET(2); > + clkevt_base = timer_base + PITn_OFFSET(3); > + > + irq = irq_of_parse_and_map(np, 0); > + BUG_ON(irq <= 0); > + > + pit_clk = of_clk_get(np, 0); > + BUG_ON(IS_ERR(pit_clk)); > + > + BUG_ON(clk_prepare_enable(pit_clk)); > + > + clk_rate = clk_get_rate(pit_clk); > + cycle_per_jiffy = clk_rate / (HZ); > + > + /* enable the pit module */ > + __raw_writel(~PITMCR_MDIS, timer_base + PITMCR); > + > + BUG_ON(pit_clocksource_init(clk_rate)); > + > + pit_clockevent_init(clk_rate, irq); > +} > +CLOCKSOURCE_OF_DECLARE(vf610, "fsl,vf610-pit", pit_timer_init); > -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog

11 years, 9 months

[ACTIVITY] (John Stultz) May 20-24

by John Stultz

=== Highlights === * Had a good call with Arnd, Jesse, Serban and Rebecca on issues facing upstreaming ION * Refactored the ION patchset trying to simplify things a bit, sent out draft to Jesse, Arnd and Serban * *Finally* got around to finishing and posting my writeup on earlysuspend https://plus.google.com/u/0/111524780435806926688/posts/RCV8EP3hFEm * Responded to community questions from my lsf-mm summary. * Sent the patch "Revert ARM: Make low-level printk work" patch to AOSP, not sure if Arve will merge it. * Reviewed Dmitry's VFAT_GET_VOLUME_ID patches * Reviewed blueprints and sent out weekly Android upstreaming sub-team status * Lots of time reviewing the ION code to better understand current issues prior to meeting. === Plans === * Get through the pending patches in my inbox and queue them for upstream * More work on refactoring the ION patchset and addressing some of the bigger issues from our discussion. * Get back to Minchan on some of his private volatile range questions === Issues === * One of my git.linaro.org repos had some strange permission changes on some of the objects, which is keeping me from being able to push changes out. Filed an IT ticket

11 years, 9 months

[ACTIVITY] (Linus Walleij) 2013-05-04 - 2013-05-17

by Linus Walleij

== Linus Walleij linusw == === Highlights === * Collected and prepared a set of pinctrl fixes and sent pull request to Torvalds. He pulled them in. * Collected and prepared a set of GPIO fixes and sent pull request to Torvalds. He pulled them in. * Continued to apply DMA40 patches from Lee on a specific DMA40 branch targeted for ARM SoC. Prepared a first pull request with the first set of Lee's patches after Vinod and Herbert ACKed them. * Reviewed lots of pinctrl code, and some GPIO code. * Prepared and sent a clocks-to-devicetree patch set for the U300. (Tying up the sack on U300.) This is now under review. * Sent a pull request for the queued patches to move Nomadik to use device tree for the clocks. * Fixed ethernet to work in Nomadik S8815. * Poked around with Nomadik S8815 user LED, and user key using the standard GPIO bindings. * Converted Nomadik to use DT for pin control. * Asked for a NHK15 board to fix the support for this board as well. * Being pleased with Lee & Fabio taking on ever more complex tasks and doing a good job overall for ux500. === Plans === * Finalize U300 DT+multiplatform patch set. Maybe send a partial pull request with the stuff I have. * Integrate Integrator PCI patch set, then start to delete board files and convert to multiplatform. * Convert Nomadik pinctrl driver to register GPIO ranges from the gpiochip side. * Test the PL08x patches on the Ericsson Research PB11MPCore and submit platform data for using pl08x DMA on that platform. * Get hands dirty with regmap. === Issues === * Subsystem maintainers in the kernel community are forced to act as standardization comittee for device tree bindings due to lack of review power. As they have to merge the bindings in the end, reviewing fall upward to the subsystem maintainers, this is something of a workload issue. * Need a PCI branch at ARM SoC to request Integrator PCI DT patches to be pulled into. (Still blocked on this for Integrator single zImage.) * Some impediments from internal turmoil @ST-Ericsson. Thanks, Linus Walleij

11 years, 9 months

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linaro-kernel May 2013