linaro-kernel February 2014

linaro-kernel@lists.linaro.org

90 participants
216 discussions

by Kevin's boot bot

Automated DT boot report for various ARM defconfigs. Tree/Branch: queue Git describe: v3.10.30 Full Report =========== omap2plus_defconfig ------------------- am335x-bone PASS: 0 min 26.6 sec omap4-panda-es PASS: 1 min 3.0 sec omap3-beagle-xm PASS: 0 min 58.0 sec omap3-tobi PASS: 0 min 33.8 sec omap4-panda PASS: 1 min 10.1 sec tegra_defconfig --------------- tegra30-beaver PASS: 0 min 17.6 sec imx_v6_v7_defconfig ------------------- imx6dl-wandboard,wand-dual PASS: 0 min 17.3 sec imx6dl-wandboard,wand-solo PASS: 0 min 18.2 sec mvebu_defconfig --------------- armada-xp-openblocks-ax3-4 PASS: 0 min 21.5 sec armada-370-mirabox PASS: 0 min 19.6 sec exynos_defconfig ---------------- exynos5250-arndale PASS: 0 min 30.1 sec sama5_defconfig --------------- sama5d35ek PASS: 0 min 17.1 sec

11 years, 2 months

queue boot: 32 pass, 1 fail (v3.12.11)

by Kevin's boot bot

Automated DT boot report for various ARM defconfigs. Tree/Branch: queue Git describe: v3.12.11 Failed boot tests (console logs at the end) =========================================== armada-370-mirabox: FAIL: mvebu_defconfig Full Report =========== omap2plus_defconfig ------------------- am335x-boneblack PASS: 0 min 25.6 sec omap3-beagle-xm PASS: 1 min 2.3 sec omap4-panda PASS: 1 min 5.6 sec omap3-tobi PASS: 0 min 22.6 sec am335x-bone PASS: 0 min 27.3 sec omap4-panda-es PASS: 1 min 6.5 sec multi_lpae_defconfig -------------------- sun7i-a20-cubieboard2 PASS: 0 min 14.0 sec tegra_defconfig --------------- tegra30-beaver PASS: 0 min 17.2 sec imx_v6_v7_defconfig ------------------- imx6dl-wandboard,wand-dual PASS: 0 min 18.1 sec imx6dl-wandboard,wand-solo PASS: 0 min 18.2 sec imx6q-wandboard PASS: 0 min 16.7 sec bcm_defconfig ------------- bcm28155-ap PASS: 0 min 53.7 sec exynos_defconfig ---------------- exynos5250-arndale PASS: 0 min 30.9 sec multi_v7_defconfig ------------------ ste-snowball PASS: 0 min 25.6 sec tegra30-beaver PASS: 0 min 16.7 sec am335x-boneblack PASS: 0 min 32.3 sec omap3-beagle-xm PASS: 1 min 2.2 sec sun7i-a20-cubieboard2 PASS: 0 min 13.4 sec armada-370-mirabox PASS: 0 min 20.5 sec omap4-panda PASS: 1 min 4.0 sec armada-xp-openblocks-ax3-4 PASS: 0 min 22.6 sec sun4i-a10-cubieboard PASS: 0 min 18.3 sec bcm28155-ap PASS: 1 min 7.2 sec imx6dl-wandboard,wand-solo PASS: 0 min 17.4 sec omap3-tobi PASS: 0 min 20.4 sec am335x-bone PASS: 0 min 33.9 sec imx6q-wandboard PASS: 0 min 19.0 sec omap4-panda-es PASS: 1 min 5.2 sec imx6dl-wandboard,wand-dual PASS: 0 min 19.8 sec u8500_defconfig --------------- ste-snowball PASS: 0 min 35.3 sec sama5_defconfig --------------- sama5d35ek PASS: 0 min 17.5 sec mvebu_defconfig --------------- armada-xp-openblocks-ax3-4 PASS: 0 min 22.2 sec armada-370-mirabox FAIL: 0 min 28.0 sec Console logs for failures ========================= mvebu_defconfig --------------- armada-370-mirabox: FAIL: last 80 lines of boot log: ---------------------------------------------------- phy16= 72 phy16= 72 MMC: MRVL_MMC: 0 Net: egiga0 [PRIME], egiga1 Hit any key to stop autoboot: 3 0 Marvell>> Marvell>version > version U-Boot 2009.08 (Sep 16 2012 - 22:50:06)Marvell version: 1.1.2 NQ Marvell>> setenv bootargs console=ttyS0,115200 debug earlyprintk setenv bootargs console=ttyS0,115200 debug earlyprintk Marvell>>setenv initrd_high 0xffffffff setenv initrd_high 0xffffffff Marvell>if test -n ${initenv}; then run initenv; fi > if test -n ${initenv}; then run initenv; fi Marvell>> if test -n ${preboot}; then run preboot; fi if test -n ${preboot}; then run preboot; fi Marvell>> setenv autoload no; setenv autoboot no setenv autoload no; setenv autoboot no Marvell>> dhcp dhcp phyaddr= 0 BOOTP broadcast 1 DHCP client bound to address 192.168.1.183 Marvell>>setenv serverip 192.168.1.2 setenv serverip 192.168.1.2 Marvell>if test -n ${netargs}; then run netargs; fi > if test -n ${netargs}; then run netargs; fi Marvell>> tftp 0x02000000 192.168.1.2:tmp/mirabox-BtuyJy/tmpd9aTzj-uImage tftp 0x02000000 192.168.1.2:tmp/mirabox-BtuyJy/tmpd9aTzj-uImage Using egiga0 device TFTP from server 192.168.1.2; our IP address is 192.168.1.183 Filename 'tmp/mirabox-BtuyJy/tmpd9aTzj-uImage'. Load address: 0x2000000 Loading: *################################################################# ################################################################# ################################################### done Bytes transferred = 2653637 (287dc5 hex) Marvell>tftp 0x03000000 192.168.1.2:buildroot.cpio.gz.uboot > tftp 0x03000000 192.168.1.2:buildroot.cpio.gz.uboot Using egiga0 device TFTP from server 192.168.1.2; our IP address is 192.168.1.183 Filename 'buildroot.cpio.gz.uboot'. Load address: 0x3000000 Loading: *############################################ done Bytes transferred = 642602 (9ce2a hex) Marvell>> printenv bootargs printenv bootargs bootargs=console=ttyS0,115200 debug earlyprintk Marvell>> bootm 0x02000000 0x03000000 bootm 0x02000000 0x03000000 ## Booting kernel from Legacy Image at 02000000 ... Image Name: Linux Created: 2014-02-14 5:20:37 UTC Image Type: ARM Linux Kernel Image (uncompressed) Data Size: 2653573 Bytes = 2.5 MB Load Address: 00008000 Entry Point: 00008000 Verifying Checksum ... OK ## Loading init Ramdisk from Legacy Image at 03000000 ... Image Name: Created: 2014-02-07 19:37:29 UTC Image Type: ARM Linux RAMDisk Image (uncompressed) Data Size: 642538 Bytes = 627.5 kB Load Address: 00000000 Entry Point: 00000000 Verifying Checksum ... OK Loading Kernel Image ... OK OK Starting kernel ... ~$off # PYBOOT: Exception: kernel: ERROR: did not start booting. # PYBOOT: Time: 28.00 seconds. # PYBOOT: Result: FAIL

11 years, 2 months

[PATCH 1/2] PPC: powernv: remove redundant cpuidle_idle_call()

by Nicolas Pitre

The core idle loop now takes care of it. Signed-off-by: Nicolas Pitre <nico(a)linaro.org> --- arch/powerpc/platforms/powernv/setup.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/arch/powerpc/platforms/powernv/setup.c b/arch/powerpc/platforms/powernv/setup.c index 21166f65c9..a932feb290 100644 --- a/arch/powerpc/platforms/powernv/setup.c +++ b/arch/powerpc/platforms/powernv/setup.c @@ -26,7 +26,6 @@ #include <linux/of_fdt.h> #include <linux/interrupt.h> #include <linux/bug.h> -#include <linux/cpuidle.h> #include <asm/machdep.h> #include <asm/firmware.h> @@ -217,16 +216,6 @@ static int __init pnv_probe(void) return 1; } -void powernv_idle(void) -{ - /* Hook to cpuidle framework if available, else - * call on default platform idle code - */ - if (cpuidle_idle_call()) { - power7_idle(); - } -} - define_machine(powernv) { .name = "PowerNV", .probe = pnv_probe, @@ -236,7 +225,7 @@ define_machine(powernv) { .show_cpuinfo = pnv_show_cpuinfo, .progress = pnv_progress, .machine_shutdown = pnv_shutdown, - .power_save = powernv_idle, + .power_save = power7_idle, .calibrate_decr = generic_calibrate_decr, #ifdef CONFIG_KEXEC .kexec_cpu_down = pnv_kexec_cpu_down, -- 1.8.4.108.g55ea5f6

11 years, 2 months

queue boot: 35 pass, 0 fail (v3.13.3)

by Kevin's boot bot

Automated DT boot report for various ARM defconfigs. Tree/Branch: queue Git describe: v3.13.3 Full Report =========== omap2plus_defconfig ------------------- am335x-boneblack PASS: 0 min 26.3 sec omap3-beagle-xm PASS: 1 min 2.7 sec omap4-panda PASS: 1 min 10.8 sec omap3-tobi PASS: 0 min 22.8 sec am335x-bone PASS: 0 min 27.6 sec omap4-panda-es PASS: 1 min 13.9 sec multi_lpae_defconfig -------------------- sun7i-a20-cubieboard2 PASS: 0 min 13.9 sec tegra_defconfig --------------- tegra30-beaver PASS: 0 min 17.3 sec imx_v6_v7_defconfig ------------------- imx6dl-wandboard,wand-dual PASS: 0 min 18.9 sec imx6dl-wandboard,wand-solo PASS: 0 min 19.1 sec imx6q-wandboard PASS: 0 min 17.2 sec sunxi_defconfig --------------- sun7i-a20-cubieboard2 PASS: 0 min 11.9 sec sun4i-a10-cubieboard PASS: 0 min 17.4 sec bcm_defconfig ------------- bcm28155-ap PASS: 0 min 59.0 sec exynos_defconfig ---------------- exynos5250-arndale PASS: 0 min 30.6 sec multi_v7_defconfig ------------------ ste-snowball PASS: 0 min 32.6 sec tegra30-beaver PASS: 0 min 17.0 sec am335x-boneblack PASS: 0 min 22.9 sec omap3-beagle-xm PASS: 0 min 59.2 sec sun7i-a20-cubieboard2 PASS: 0 min 14.0 sec armada-370-mirabox PASS: 0 min 20.5 sec omap4-panda PASS: 1 min 3.5 sec armada-xp-openblocks-ax3-4 PASS: 0 min 22.6 sec sun4i-a10-cubieboard PASS: 0 min 18.4 sec bcm28155-ap PASS: 1 min 4.1 sec imx6dl-wandboard,wand-solo PASS: 0 min 17.6 sec omap3-tobi PASS: 0 min 21.1 sec am335x-bone PASS: 0 min 24.5 sec imx6q-wandboard PASS: 0 min 16.8 sec omap4-panda-es PASS: 1 min 3.9 sec imx6dl-wandboard,wand-dual PASS: 0 min 17.9 sec u8500_defconfig --------------- ste-snowball PASS: 0 min 34.1 sec sama5_defconfig --------------- sama5d35ek PASS: 0 min 21.3 sec mvebu_defconfig --------------- armada-xp-openblocks-ax3-4 PASS: 0 min 20.8 sec armada-370-mirabox PASS: 0 min 17.0 sec

11 years, 2 months

[PATCH] MAINTAINERS: Add entry for Cirrus CODEC drivers

by Mark Brown

From: Mark Brown <broonie(a)linaro.org> I noticed that some recent patches hadn't been CCed to the Cirrus people - add an entry in MAINTAINERS to help make that happen. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- Brian, Paul - are you OK with this? MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b97ce2594f16..5ef6c0277075 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2200,6 +2200,13 @@ L: alsa-devel(a)alsa-project.org (moderated for non-subscribers) S: Odd Fixes F: sound/soc/codecs/cs4270* +CIRRUS LOGIC AUDIO CODEC DRIVERS +M: Brian Austin <brian.austin(a)cirrus.com> +M: Paul Handrigan <Paul.Handrigan(a)cirrus.com> +L: alsa-devel(a)alsa-project.org (moderated for non-subscribers) +S: Maintained +F: sound/soc/codecs/cs* + CLEANCACHE API M: Konrad Rzeszutek Wilk <konrad.wilk(a)oracle.com> L: linux-kernel(a)vger.kernel.org -- 1.9.rc1

11 years, 2 months

[PATCH] ARM: OMAP4: sleep: byteswap data for big-endian

by Taras Kondratiuk

From: Victor Kamensky <victor.kamensky(a)linaro.org> Assembler functions defined in sleep44xx.S need to byteswap values after read / before write from h/w register if code compiled in big endian mode. Simple change to do 'rev x, x' before str instruction and after ldr instruction that deals with h/w registers. Signed-off-by: Victor Kamensky <victor.kamensky(a)linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk(a)linaro.org> --- This is a part of RFC series [1]. Based on v3.13-rc8. [1] http://www.spinics.net/lists/linux-omap/msg99927.html arch/arm/mach-omap2/sleep44xx.S | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S index 9086ce0..8017016 100644 --- a/arch/arm/mach-omap2/sleep44xx.S +++ b/arch/arm/mach-omap2/sleep44xx.S @@ -12,6 +12,7 @@ #include <linux/linkage.h> #include <asm/smp_scu.h> #include <asm/memory.h> +#include <asm/assembler.h> #include <asm/hardware/cache-l2x0.h> #include "omap-secure.h" @@ -74,6 +75,7 @@ ENTRY(omap4_finish_suspend) */ bl omap4_get_sar_ram_base ldr r9, [r0, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r9, r9) cmp r9, #0x1 @ Check for HS device bne skip_secure_l1_clean mov r0, #SCU_PM_NORMAL @@ -113,12 +115,14 @@ skip_secure_l1_clean: bl omap4_get_sar_ram_base mov r8, r0 ldr r9, [r8, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r9, r9) cmp r9, #0x1 @ Check for HS device bne scu_gp_set mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR ands r0, r0, #0x0f ldreq r0, [r8, #SCU_OFFSET0] ldrne r0, [r8, #SCU_OFFSET1] +ARM_BE8(rev r0, r0) mov r1, #0x00 stmfd r13!, {r4-r12, r14} ldr r12, =OMAP4_MON_SCU_PWR_INDEX @@ -130,6 +134,7 @@ scu_gp_set: ands r0, r0, #0x0f ldreq r1, [r8, #SCU_OFFSET0] ldrne r1, [r8, #SCU_OFFSET1] +ARM_BE8(rev r1, r1) bl omap4_get_scu_base bl scu_power_mode skip_scu_gp_set: @@ -157,6 +162,7 @@ skip_scu_gp_set: ands r5, r5, #0x0f ldreq r0, [r8, #L2X0_SAVE_OFFSET0] @ Retrieve L2 state from SAR ldrne r0, [r8, #L2X0_SAVE_OFFSET1] @ memory. +ARM_BE8(rev r0, r0) cmp r0, #3 bne do_WFI #ifdef CONFIG_PL310_ERRATA_727915 @@ -167,9 +173,11 @@ skip_scu_gp_set: bl omap4_get_l2cache_base mov r2, r0 ldr r0, =0xffff +ARM_BE8(rev r0, r0) str r0, [r2, #L2X0_CLEAN_INV_WAY] wait: ldr r0, [r2, #L2X0_CLEAN_INV_WAY] +ARM_BE8(rev r0, r0) ldr r1, =0xffff ands r0, r0, r1 bne wait @@ -182,9 +190,11 @@ l2x_sync: bl omap4_get_l2cache_base mov r2, r0 mov r0, #0x0 +ARM_BE8(rev r0, r0) str r0, [r2, #L2X0_CACHE_SYNC] sync: ldr r0, [r2, #L2X0_CACHE_SYNC] +ARM_BE8(rev r0, r0) ands r0, r0, #0x1 bne sync #endif @@ -216,6 +226,7 @@ do_WFI: bl omap4_get_sar_ram_base mov r8, r0 ldr r9, [r8, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r9, r9) cmp r9, #0x1 @ Check for HS device bne scu_gp_clear mov r0, #SCU_PM_NORMAL @@ -258,6 +269,7 @@ ENTRY(omap4_cpu_resume) */ ldr r8, =OMAP44XX_SAR_RAM_BASE ldr r9, [r8, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r9, r9) cmp r9, #0x1 @ Skip if GP device bne skip_ns_smp_enable mrc p15, 0, r0, c0, c0, 5 @@ -292,16 +304,19 @@ skip_ns_smp_enable: */ ldr r2, =OMAP44XX_L2CACHE_BASE ldr r0, [r2, #L2X0_CTRL] +ARM_BE8(rev r0, r0) and r0, #0x0f cmp r0, #1 beq skip_l2en @ Skip if already enabled ldr r3, =OMAP44XX_SAR_RAM_BASE ldr r1, [r3, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r1, r1) cmp r1, #0x1 @ Check for HS device bne set_gp_por ldr r0, =OMAP4_PPA_L2_POR_INDEX ldr r1, =OMAP44XX_SAR_RAM_BASE ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET] +ARM_BE8(rev r4, r4) adr r3, ppa_por_params str r4, [r3, #0x04] mov r1, #0x0 @ Process ID @@ -313,11 +328,13 @@ skip_ns_smp_enable: set_gp_por: ldr r1, =OMAP44XX_SAR_RAM_BASE ldr r0, [r1, #L2X0_PREFETCH_CTRL_OFFSET] +ARM_BE8(rev r0, r0) ldr r12, =OMAP4_MON_L2X0_PREFETCH_INDEX @ Setup L2 PREFETCH DO_SMC set_aux_ctrl: ldr r1, =OMAP44XX_SAR_RAM_BASE ldr r0, [r1, #L2X0_AUXCTRL_OFFSET] +ARM_BE8(rev r0, r0) ldr r12, =OMAP4_MON_L2X0_AUXCTRL_INDEX @ Setup L2 AUXCTRL DO_SMC mov r0, #0x1 -- 1.7.9.5

11 years, 2 months

[PATCH] perf: ARM64: wire up perf_regs and unwind support

by Jean Pihet

This patch hooks in the perf_regs and libunwind code for ARM64. The tools/perf/arch/arm64 is created; it contains the arch specific code for DWARF unwinding. Signed-off-by: Jean Pihet <jean.pihet(a)linaro.org> Acked-by: Will Deacon <will.deacon(a)arm.com> --- tools/perf/arch/arm64/Makefile | 7 +++ tools/perf/arch/arm64/include/perf_regs.h | 88 +++++++++++++++++++++++++++++++ tools/perf/arch/arm64/util/dwarf-regs.c | 80 ++++++++++++++++++++++++++++ tools/perf/arch/arm64/util/unwind.c | 82 ++++++++++++++++++++++++++++ tools/perf/config/Makefile | 8 ++- 5 files changed, 264 insertions(+), 1 deletion(-) create mode 100644 tools/perf/arch/arm64/Makefile create mode 100644 tools/perf/arch/arm64/include/perf_regs.h create mode 100644 tools/perf/arch/arm64/util/dwarf-regs.c create mode 100644 tools/perf/arch/arm64/util/unwind.c diff --git a/tools/perf/arch/arm64/Makefile b/tools/perf/arch/arm64/Makefile new file mode 100644 index 0000000..fe9b61e --- /dev/null +++ b/tools/perf/arch/arm64/Makefile @@ -0,0 +1,7 @@ +ifndef NO_DWARF +PERF_HAVE_DWARF_REGS := 1 +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/dwarf-regs.o +endif +ifndef NO_LIBUNWIND +LIB_OBJS += $(OUTPUT)arch/$(ARCH)/util/unwind.o +endif diff --git a/tools/perf/arch/arm64/include/perf_regs.h b/tools/perf/arch/arm64/include/perf_regs.h new file mode 100644 index 0000000..2359546 --- /dev/null +++ b/tools/perf/arch/arm64/include/perf_regs.h @@ -0,0 +1,88 @@ +#ifndef ARCH_PERF_REGS_H +#define ARCH_PERF_REGS_H + +#include <stdlib.h> +#include "../../util/types.h" +#include <asm/perf_regs.h> + +#define PERF_REGS_MASK ((1ULL << PERF_REG_ARM64_MAX) - 1) +#define PERF_REG_IP PERF_REG_ARM64_PC +#define PERF_REG_SP PERF_REG_ARM64_SP + +static inline const char *perf_reg_name(int id) +{ + switch (id) { + case PERF_REG_ARM64_X0: + return "x0"; + case PERF_REG_ARM64_X1: + return "x1"; + case PERF_REG_ARM64_X2: + return "x2"; + case PERF_REG_ARM64_X3: + return "x3"; + case PERF_REG_ARM64_X4: + return "x4"; + case PERF_REG_ARM64_X5: + return "x5"; + case PERF_REG_ARM64_X6: + return "x6"; + case PERF_REG_ARM64_X7: + return "x7"; + case PERF_REG_ARM64_X8: + return "x8"; + case PERF_REG_ARM64_X9: + return "x9"; + case PERF_REG_ARM64_X10: + return "x10"; + case PERF_REG_ARM64_X11: + return "x11"; + case PERF_REG_ARM64_X12: + return "x12"; + case PERF_REG_ARM64_X13: + return "x13"; + case PERF_REG_ARM64_X14: + return "x14"; + case PERF_REG_ARM64_X15: + return "x15"; + case PERF_REG_ARM64_X16: + return "x16"; + case PERF_REG_ARM64_X17: + return "x17"; + case PERF_REG_ARM64_X18: + return "x18"; + case PERF_REG_ARM64_X19: + return "x19"; + case PERF_REG_ARM64_X20: + return "x20"; + case PERF_REG_ARM64_X21: + return "x21"; + case PERF_REG_ARM64_X22: + return "x22"; + case PERF_REG_ARM64_X23: + return "x23"; + case PERF_REG_ARM64_X24: + return "x24"; + case PERF_REG_ARM64_X25: + return "x25"; + case PERF_REG_ARM64_X26: + return "x26"; + case PERF_REG_ARM64_X27: + return "x27"; + case PERF_REG_ARM64_X28: + return "x28"; + case PERF_REG_ARM64_X29: + return "x29"; + case PERF_REG_ARM64_SP: + return "sp"; + case PERF_REG_ARM64_LR: + return "lr"; + case PERF_REG_ARM64_PC: + return "pc"; + default: + return NULL; + } + + return NULL; +} + +#endif /* ARCH_PERF_REGS_H */ diff --git a/tools/perf/arch/arm64/util/dwarf-regs.c b/tools/perf/arch/arm64/util/dwarf-regs.c new file mode 100644 index 0000000..d49efeb --- /dev/null +++ b/tools/perf/arch/arm64/util/dwarf-regs.c @@ -0,0 +1,80 @@ +/* + * Mapping of DWARF debug register numbers into register names. + * + * Copyright (C) 2010 Will Deacon, ARM Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <stddef.h> +#include <dwarf-regs.h> + +struct pt_regs_dwarfnum { + const char *name; + unsigned int dwarfnum; +}; + +#define STR(s) #s +#define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num} +#define GPR_DWARFNUM_NAME(num) \ + {.name = STR(%x##num), .dwarfnum = num} +#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0} + +/* + * Reference: + * http://infocenter.arm.com/help/topic/com.arm.doc.ihi0057b/IHI0057B_aadwarf6… + */ +static const struct pt_regs_dwarfnum regdwarfnum_table[] = { + GPR_DWARFNUM_NAME(0), + GPR_DWARFNUM_NAME(1), + GPR_DWARFNUM_NAME(2), + GPR_DWARFNUM_NAME(3), + GPR_DWARFNUM_NAME(4), + GPR_DWARFNUM_NAME(5), + GPR_DWARFNUM_NAME(6), + GPR_DWARFNUM_NAME(7), + GPR_DWARFNUM_NAME(8), + GPR_DWARFNUM_NAME(9), + GPR_DWARFNUM_NAME(10), + GPR_DWARFNUM_NAME(11), + GPR_DWARFNUM_NAME(12), + GPR_DWARFNUM_NAME(13), + GPR_DWARFNUM_NAME(14), + GPR_DWARFNUM_NAME(15), + GPR_DWARFNUM_NAME(16), + GPR_DWARFNUM_NAME(17), + GPR_DWARFNUM_NAME(18), + GPR_DWARFNUM_NAME(19), + GPR_DWARFNUM_NAME(20), + GPR_DWARFNUM_NAME(21), + GPR_DWARFNUM_NAME(22), + GPR_DWARFNUM_NAME(23), + GPR_DWARFNUM_NAME(24), + GPR_DWARFNUM_NAME(25), + GPR_DWARFNUM_NAME(26), + GPR_DWARFNUM_NAME(27), + GPR_DWARFNUM_NAME(28), + GPR_DWARFNUM_NAME(29), + REG_DWARFNUM_NAME("%lr", 30), + REG_DWARFNUM_NAME("%sp", 31), + REG_DWARFNUM_END, +}; + +/** + * get_arch_regstr() - lookup register name from it's DWARF register number + * @n: the DWARF register number + * + * get_arch_regstr() returns the name of the register in struct + * regdwarfnum_table from it's DWARF register number. If the register is not + * found in the table, this returns NULL; + */ +const char *get_arch_regstr(unsigned int n) +{ + const struct pt_regs_dwarfnum *roff; + for (roff = regdwarfnum_table; roff->name != NULL; roff++) + if (roff->dwarfnum == n) + return roff->name; + return NULL; +} diff --git a/tools/perf/arch/arm64/util/unwind.c b/tools/perf/arch/arm64/util/unwind.c new file mode 100644 index 0000000..8d37a4c --- /dev/null +++ b/tools/perf/arch/arm64/util/unwind.c @@ -0,0 +1,82 @@ + +#include <errno.h> +#include <libunwind.h> +#include "perf_regs.h" +#include "../../util/unwind.h" + +int unwind__arch_reg_id(int regnum) +{ + switch (regnum) { + case UNW_AARCH64_X0: + return PERF_REG_ARM64_X0; + case UNW_AARCH64_X1: + return PERF_REG_ARM64_X1; + case UNW_AARCH64_X2: + return PERF_REG_ARM64_X2; + case UNW_AARCH64_X3: + return PERF_REG_ARM64_X3; + case UNW_AARCH64_X4: + return PERF_REG_ARM64_X4; + case UNW_AARCH64_X5: + return PERF_REG_ARM64_X5; + case UNW_AARCH64_X6: + return PERF_REG_ARM64_X6; + case UNW_AARCH64_X7: + return PERF_REG_ARM64_X7; + case UNW_AARCH64_X8: + return PERF_REG_ARM64_X8; + case UNW_AARCH64_X9: + return PERF_REG_ARM64_X9; + case UNW_AARCH64_X10: + return PERF_REG_ARM64_X10; + case UNW_AARCH64_X11: + return PERF_REG_ARM64_X11; + case UNW_AARCH64_X12: + return PERF_REG_ARM64_X12; + case UNW_AARCH64_X13: + return PERF_REG_ARM64_X13; + case UNW_AARCH64_X14: + return PERF_REG_ARM64_X14; + case UNW_AARCH64_X15: + return PERF_REG_ARM64_X15; + case UNW_AARCH64_X16: + return PERF_REG_ARM64_X16; + case UNW_AARCH64_X17: + return PERF_REG_ARM64_X17; + case UNW_AARCH64_X18: + return PERF_REG_ARM64_X18; + case UNW_AARCH64_X19: + return PERF_REG_ARM64_X19; + case UNW_AARCH64_X20: + return PERF_REG_ARM64_X20; + case UNW_AARCH64_X21: + return PERF_REG_ARM64_X21; + case UNW_AARCH64_X22: + return PERF_REG_ARM64_X22; + case UNW_AARCH64_X23: + return PERF_REG_ARM64_X23; + case UNW_AARCH64_X24: + return PERF_REG_ARM64_X24; + case UNW_AARCH64_X25: + return PERF_REG_ARM64_X25; + case UNW_AARCH64_X26: + return PERF_REG_ARM64_X26; + case UNW_AARCH64_X27: + return PERF_REG_ARM64_X27; + case UNW_AARCH64_X28: + return PERF_REG_ARM64_X28; + case UNW_AARCH64_X29: + return PERF_REG_ARM64_X29; + case UNW_AARCH64_X30: + return PERF_REG_ARM64_LR; + case UNW_AARCH64_SP: + return PERF_REG_ARM64_SP; + case UNW_AARCH64_PC: + return PERF_REG_ARM64_PC; + default: + pr_err("unwind: invalid reg id %d\n", regnum); + return -EINVAL; + } + + return -EINVAL; +} diff --git a/tools/perf/config/Makefile b/tools/perf/config/Makefile index c48d449..5c0a6ed 100644 --- a/tools/perf/config/Makefile +++ b/tools/perf/config/Makefile @@ -29,11 +29,17 @@ ifeq ($(ARCH),x86) endif NO_PERF_REGS := 0 endif + ifeq ($(ARCH),arm) NO_PERF_REGS := 0 LIBUNWIND_LIBS = -lunwind -lunwind-arm endif +ifeq ($(ARCH),arm64) + NO_PERF_REGS := 0 + LIBUNWIND_LIBS = -lunwind -lunwind-aarch64 +endif + ifeq ($(LIBUNWIND_LIBS),) NO_LIBUNWIND := 1 else @@ -327,7 +333,7 @@ ifndef NO_LIBUNWIND msg := $(warning No libunwind found, disabling post unwind support. Please install libunwind-dev[el] >= 1.1); NO_LIBUNWIND := 1 else - ifeq ($(ARCH),arm) + ifeq ($(ARCH),$(filter $(ARCH),arm arm64)) $(call feature_check,libunwind-debug-frame) ifneq ($(feature-libunwind-debug-frame), 1) msg := $(warning No debug_frame support found in libunwind); -- 1.7.11.7

11 years, 2 months

[PATCH] [RFC] Support for creating generic host_bridge from device tree

by Liviu Dudau

Following the discussion started here [1], I now have a proposal for tackling generic support for host bridges described via device tree. It is an initial stab at it, to try to get feedback and suggestions, but it is functional enough that I have PCI Express for arm64 working on an FPGA using the patch that I am also publishing that adds support for PCI for that platform. Looking at the existing architectures that fit the requirements (use of device tree and PCI) yields the powerpc and microblaze as generic enough to make them candidates for conversion. I have a tentative patch for microblaze that I can only compile test it, unfortunately using qemu-microblaze leads to an early crash in the kernel. As Bjorn has mentioned in the previous discussion, the idea is to add to struct pci_host_bridge enough data to be able to reduce the size or remove the architecture specific pci_controller structure. arm64 support actually manages to get rid of all the architecture static data and has no pci_controller structure defined. For host bridge drivers that means a change of API unless architectures decide to provide a compatibility layer (comments here please). In order to initialise a host bridge with the new API, the following example code is sufficient for a _probe() function: static int myhostbridge_probe(struct platform_device *pdev) { int err; struct device_node *dev; struct pci_host_bridge *bridge; struct resource bus_range; struct myhostbridge_port *pp; LIST_HEAD(resources); dev = pdev->dev.of_node; if (!of_device_is_available(dev)) { pr_warn("%s: disabled\n", dev->full_name); return -ENODEV; } pp = kzalloc(sizeof(struct myhostbridge_port), GFP_KERNEL); if (!pp) return -ENOMEM; err = of_pci_parse_bus_range(dev, &bus_range); if (err) { bus_range.start = 0; bus_range.end = 255; bus_range.flags = IORESOURCE_BUS; } pci_add_resource(&resources, &bus_range); bridge = pci_host_bridge_of_init(&pdev->dev, 0, &myhostbridge_ops, pp, &resources); if (!bridge) { err = -EINVAL; goto bridge_init_fail; } err = myhostbridge_setup(bridge->bus); if (err) goto bridge_init_fail; /* * Add flags here, this is just an example */ pci_add_flags(PCI_ENABLE_PROC_DOMAINS | PCI_COMPAT_DOMAIN_0); pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC); bus_range.end = pci_scan_child_bus(bridge->bus); pci_bus_update_busn_res_end(bridge->bus, bus_range.end); pci_assign_unassigned_bus_resources(bridge->bus); pci_bus_add_devices(bridge->bus); return 0; bridge_init_fail: kfree(pp); pci_free_resource_list(&resources); return err; } Best regards, Liviu Dudau [1] http://thread.gmane.org/gmane.linux.kernel.pci/25946 Liviu Dudau (1): pci: Add support for creating a generic host_bridge from device tree drivers/pci/host-bridge.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/probe.c | 11 ++++++ include/linux/pci.h | 14 ++++++++ 3 files changed, 117 insertions(+) -- 1.8.5.3

11 years, 2 months

[PATCH V2 0/3] sched: idle_balance() cleanup and fix

by Daniel Lezcano

Peter, this patchset replace the beginning of the previous mixed one which was not yet commited [1] without changes except a compilation error fix for UP kernel config. It is refreshed against tip/sched/core. As the UP config compilation is broken on the previous patchset, git bisect is no longer safe for it. You can apply this small serie and drop the 3 first patches of the previous series [1], or ignore it and I will bring the fix after you applied [1]. It cleanups the idle_balance function parameters by passing the struct rq only, fixes a race in the idle_balance function and finally move the idle_stamp from fair.c to core.c. I am aware it will return back to fair.c with Peter's pending patches but at least it changes the idle_balance() function to return true if a balance occured. [1] https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg577271.html Changelog: V2: * fixed compilation errors when CONFIG_SMP=n V1: initial post Daniel Lezcano (3): sched: Remove cpu parameter for idle_balance() sched: Fix race in idle_balance() sched: Move idle_stamp up to the core kernel/sched/core.c | 13 +++++++++++-- kernel/sched/fair.c | 20 +++++++++++++------- kernel/sched/sched.h | 8 +------- 3 files changed, 25 insertions(+), 16 deletions(-) -- 1.7.9.5

11 years, 2 months

Re: [RFC PATCH V2] ARM: EXYNOS: Fix hotplug when CPUs boot in HYP mode

by Viresh Kumar

Getting rid of mainline and getting Linaro list in.. On Tue, May 7, 2013 at 11:21 AM, <giridhar.maruthy(a)linaro.org> wrote: > From: Giridhar Maruthy <giridhar.maruthy(a)linaro.org> > > In intial boot-up, u-boot commit "3d28a181aab5e... arndale5250: Boot in Hyp > mode and enable architected timers" puts the CPUs in HYP mode. > > Hence, the CPUs need to be put in HYP mode when they are hot plugged out and > plugged in back. > > This patch is almost same as above u-boot patch, it additionally takes care > if the kernel is compiled with thumb-2 option. > > Signed-off-by: Giridhar Maruthy <giridhar.m(a)samsung.com> > Signed-off-by: Inderpal Singh <inderpal.singh(a)linaro.org> > --- > arch/arm/mach-exynos/headsmp.S | 114 ++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 114 insertions(+) I have been using this patch recently on mainline kernel and LNG kernel to get CPU hotplug working. Recently we saw crashes in LNG kernel even if this patch was in and found that this patch doesn't work well in case CONFIG_THUMB2_KERNEL is enabled in kernel. LNG kernels have that enabled by default.. [ 126.028362] IRQ153 no longer affine to CPU1 [ 126.028732] CPU1: shutdown [ 126.028771] Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP THUMB2 [ 126.028796] Modules linked in: [ 126.028846] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.12.9-00184-g0e7f8d5 #35 [ 126.028878] task: ef09e080 ti: ef0be000 task.ti: ef0be000 [ 126.028905] PC is at 0xc065e6ae [ 126.028958] LR is at exynos_cpu_die+0x4f/0xc4 [ 126.029014] pc : [<c065e6ae>] lr : [<c025b06f>] psr: 60070093 [ 126.029014] sp : ef0bffc8 ip : 00000001 fp : 00000000 [ 126.029043] r10: 00000000 r9 : 00000001 r8 : c03fc98f [ 126.029081] r7 : 00000000 r6 : f8182080 r5 : c03cfc60 r4 : c03cfa9c [ 126.029118] r3 : 02000002 r2 : 00000000 r1 : 701fe00a r0 : 00000001 [ 126.029151] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 126.029186] Control: 50c53879 Table: 4000406a DAC: 00000015 [ 126.029219] Process swapper/1 (pid: 0, stack limit = 0xef0be240) [ 126.029248] Stack: (0xef0bffc8 to 0xef0c0000) [ 126.029309] ffc0: 00000001 00000001 c02629a4 00000001 c03cc44c c02629a4 [ 126.029385] ffe0: c03fc98f c025aff7 ef0be000 c003e435 c03fccf8 400084c9 ffffffff ffffbfff [ 126.029505] [<c025b06f>] (exynos_cpu_die+0x4f/0xc4) from [<c025aff7>] (cpu_die+0x27/0x50) [ 126.029639] [<c025aff7>] (cpu_die+0x27/0x50) from [<c003e435>] (cpu_startup_entry+0xbd/0xe8) [ 126.029750] [<c003e435>] (cpu_startup_entry+0xbd/0xe8) from [<400084c9>] (0x400084c9) [ 126.029809] Code: 00000000 00005000 00000000 ffff0000 (0000ffff) [ 126.029838] ---[ end trace fbec164dd7bcae1c ]--- [ 126.029868] Kernel panic - not syncing: Attempted to kill the idle task! [ 126.173782] CPU0: stopping [ 126.176429] CPU: 0 PID: 1962 Comm: bash Tainted: G D 3.12.9-00184-g0e7f8d5 #35 [ 126.184394] [<c00110ad>] (unwind_backtrace+0x1/0x98) from [<c000ee53>] (show_stack+0xb/0xc) [ 126.192584] [<c000ee53>] (show_stack+0xb/0xc) from [<c025d613>] (dump_stack+0x4b/0x7c) [ 126.200354] [<c025d613>] (dump_stack+0x4b/0x7c) from [<c00107c3>] (handle_IPI+0xa3/0xc4) [ 126.208295] [<c00107c3>] (handle_IPI+0xa3/0xc4) from [<c000842d>] (gic_handle_irq+0x4d/0x54) [ 126.216582] [<c000842d>] (gic_handle_irq+0x4d/0x54) from [<c000f65b>] (__irq_svc+0x3b/0x80) [ 126.224775] Exception stack(0xee05fde8 to 0xee05fe30) [ 126.229727] fde0: 00000000 c1462390 ee05fe28 00000000 0000000e 00000001 [ 126.237759] fe00: c03d37ac c03ffb18 00000000 00000000 00000000 60070013 00000020 ee05fe30 [ 126.245785] fe20: c003cf41 c003d558 40070033 ffffffff [ 126.250748] [<c000f65b>] (__irq_svc+0x3b/0x80) from [<c003d558>] (vprintk_emit+0x158/0x370) [ 126.258947] [<c003d558>] (vprintk_emit+0x158/0x370) from [<c025bbdd>] (printk+0x21/0x2c) [ 126.266887] [<c025bbdd>] (printk+0x21/0x2c) from [<c00104e3>] (__cpu_die+0x1f/0x58) [ 126.274402] [<c00104e3>] (__cpu_die+0x1f/0x58) from [<c025b1f7>] (_cpu_down+0xa7/0x198) [ 126.282260] [<c025b1f7>] (_cpu_down+0xa7/0x198) from [<c025b2fd>] (cpu_down+0x15/0x28) [ 126.290036] [<c025b2fd>] (cpu_down+0x15/0x28) from [<c017571d>] (device_offline+0x4d/0x74) [ 126.298150] [<c017571d>] (device_offline+0x4d/0x74) from [<c01757c1>] (online_store+0x29/0x44) [ 126.306605] [<c01757c1>] (online_store+0x29/0x44) from [<c01741cb>] (dev_attr_store+0xb/0x14) [ 126.314978] [<c01741cb>] (dev_attr_store+0xb/0x14) from [<c00b64c5>] (sysfs_write_file+0xe5/0x10c) [ 126.323775] [<c00b64c5>] (sysfs_write_file+0xe5/0x10c) from [<c007c2b9>] (vfs_write+0x6d/0x104) [ 126.332312] [<c007c2b9>] (vfs_write+0x6d/0x104) from [<c007c53d>] (SyS_write+0x29/0x4c) [ 126.340170] [<c007c53d>] (SyS_write+0x29/0x4c) from [<c000cba1>] (ret_fast_syscall+0x1/0x46) Don't know why we need that for though (i.e. the config option).. -- viresh

11 years, 2 months

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linaro-kernel February 2014